| base.hh (13624:3d8220c2d41d) | base.hh (13717:11e81e2a98bd) |
|---|---|
| 1/* 2 * Copyright (c) 2012-2013, 2015-2016, 2018 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 317 unchanged lines hidden (view full) --- 326 BasePrefetcher *prefetcher; 327 328 /** To probe when a cache hit occurs */ 329 ProbePointArg<PacketPtr> *ppHit; 330 331 /** To probe when a cache miss occurs */ 332 ProbePointArg<PacketPtr> *ppMiss; 333 | 1/* 2 * Copyright (c) 2012-2013, 2015-2016, 2018 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 317 unchanged lines hidden (view full) --- 326 BasePrefetcher *prefetcher; 327 328 /** To probe when a cache hit occurs */ 329 ProbePointArg<PacketPtr> *ppHit; 330 331 /** To probe when a cache miss occurs */ 332 ProbePointArg<PacketPtr> *ppMiss; 333 |
| 334 /** To probe when a cache fill occurs */ 335 ProbePointArg<PacketPtr> *ppFill; 336 |
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| 334 /** 335 * The writeAllocator drive optimizations for streaming writes. 336 * It first determines whether a WriteReq MSHR should be delayed, 337 * thus ensuring that we wait longer in cases when we are write 338 * coalescing and allowing all the bytes of the line to be written 339 * before the MSHR packet is sent downstream. This works in unison 340 * with the tracking in the MSHR to check if the entire line is 341 * written. The write mode also affects the behaviour on filling --- 1007 unchanged lines hidden --- | 337 /** 338 * The writeAllocator drive optimizations for streaming writes. 339 * It first determines whether a WriteReq MSHR should be delayed, 340 * thus ensuring that we wait longer in cases when we are write 341 * coalescing and allowing all the bytes of the line to be written 342 * before the MSHR packet is sent downstream. This works in unison 343 * with the tracking in the MSHR to check if the entire line is 344 * written. The write mode also affects the behaviour on filling --- 1007 unchanged lines hidden --- |