base.hh (11375:f98df9231cdd) base.hh (11436:f351b7f248db)
1/*
2 * Copyright (c) 2012-2013, 2015-2016 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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382 Stats::Formula avg_blocked;
383
384 /** The number of fast writes (WH64) performed. */
385 Stats::Scalar fastWrites;
386
387 /** The number of cache copies performed. */
388 Stats::Scalar cacheCopies;
389
1/*
2 * Copyright (c) 2012-2013, 2015-2016 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 373 unchanged lines hidden (view full) ---

382 Stats::Formula avg_blocked;
383
384 /** The number of fast writes (WH64) performed. */
385 Stats::Scalar fastWrites;
386
387 /** The number of cache copies performed. */
388 Stats::Scalar cacheCopies;
389
390 /** The number of times a HW-prefetched block is evicted w/o reference. */
391 Stats::Scalar unusedPrefetches;
392
390 /** Number of blocks written back per thread. */
391 Stats::Vector writebacks;
392
393 /** Number of misses that hit in the MSHRs per command and thread. */
394 Stats::Vector mshr_hits[MemCmd::NUM_MEM_CMDS];
395 /** Demand misses that hit in the MSHRs. */
396 Stats::Formula demandMshrHits;
397 /** Total number of misses that hit in the MSHRs. */

--- 220 unchanged lines hidden --- 		393 /** Number of blocks written back per thread. */
394 Stats::Vector writebacks;
395
396 /** Number of misses that hit in the MSHRs per command and thread. */
397 Stats::Vector mshr_hits[MemCmd::NUM_MEM_CMDS];
398 /** Demand misses that hit in the MSHRs. */
399 Stats::Formula demandMshrHits;
400 /** Total number of misses that hit in the MSHRs. */

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