base.hh (10887:279efb97ec99) base.hh (10912:b99a6662d7c2)
1/*
2 * Copyright (c) 2012-2013, 2015 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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588 {
589 // Obsolete... we no longer signal bus requests explicitly so
590 // we can't deassert them. Leaving this in as a no-op since
591 // the prefetcher calls it to indicate that it no longer wants
592 // to request a prefetch, and someday that might be
593 // interesting again.
594 }
595
1/*
2 * Copyright (c) 2012-2013, 2015 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 579 unchanged lines hidden (view full) ---

588 {
589 // Obsolete... we no longer signal bus requests explicitly so
590 // we can't deassert them. Leaving this in as a no-op since
591 // the prefetcher calls it to indicate that it no longer wants
592 // to request a prefetch, and someday that might be
593 // interesting again.
594 }
595
596 virtual unsigned int drain(DrainManager *dm);
597
598 virtual bool inCache(Addr addr, bool is_secure) const = 0;
599
600 virtual bool inMissQueue(Addr addr, bool is_secure) const = 0;
601
602 void incMissCount(PacketPtr pkt)
603 {
604 assert(pkt->req->masterId() < system->maxMasters());
605 misses[pkt->cmdToIndex()][pkt->req->masterId()]++;

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596 virtual bool inCache(Addr addr, bool is_secure) const = 0;
597
598 virtual bool inMissQueue(Addr addr, bool is_secure) const = 0;
599
600 void incMissCount(PacketPtr pkt)
601 {
602 assert(pkt->req->masterId() < system->maxMasters());
603 misses[pkt->cmdToIndex()][pkt->req->masterId()]++;

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