base.hh (10582:c04dc66e4316) base.hh (10679:204a0f53035e)
1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 204 unchanged lines hidden (view full) ---

213
214 if (requestBus) {
215 requestMemSideBus((RequestCause)mq->index, time);
216 }
217
218 return mshr;
219 }
220
1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 204 unchanged lines hidden (view full) ---

213
214 if (requestBus) {
215 requestMemSideBus((RequestCause)mq->index, time);
216 }
217
218 return mshr;
219 }
220
221 void markInServiceInternal(MSHR *mshr, PacketPtr pkt)
221 void markInServiceInternal(MSHR *mshr, bool pending_dirty_resp)
222 {
223 MSHRQueue *mq = mshr->queue;
224 bool wasFull = mq->isFull();
222 {
223 MSHRQueue *mq = mshr->queue;
224 bool wasFull = mq->isFull();
225 mq->markInService(mshr, pkt);
225 mq->markInService(mshr, pending_dirty_resp);
226 if (wasFull && !mq->isFull()) {
227 clearBlocked((BlockedCause)mq->index);
228 }
229 }
230
231 /**
232 * Write back dirty blocks in the cache using functional accesses.
233 */

--- 359 unchanged lines hidden --- 		226 if (wasFull && !mq->isFull()) {
227 clearBlocked((BlockedCause)mq->index);
228 }
229 }
230
231 /**
232 * Write back dirty blocks in the cache using functional accesses.
233 */

--- 359 unchanged lines hidden ---