base.hh (10028:fb8c44de891a) base.hh (10344:fa9ef374075f)
1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 168 unchanged lines hidden (view full) ---

177 SlavePacketQueue queue;
178
179 bool blocked;
180
181 bool mustSendRetry;
182
183 private:
184
1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 168 unchanged lines hidden (view full) ---

177 SlavePacketQueue queue;
178
179 bool blocked;
180
181 bool mustSendRetry;
182
183 private:
184
185 EventWrapper<SlavePort, &SlavePort::sendRetry> sendRetryEvent;
185 void processSendRetry();
186
186
187 EventWrapper<CacheSlavePort,
188 &CacheSlavePort::processSendRetry> sendRetryEvent;
189
187 };
188
189 CacheSlavePort *cpuSidePort;
190 CacheMasterPort *memSidePort;
191
192 protected:
193
194 /** Miss status registers */

--- 393 unchanged lines hidden --- 		190 };
191
192 CacheSlavePort *cpuSidePort;
193 CacheMasterPort *memSidePort;
194
195 protected:
196
197 /** Miss status registers */

--- 393 unchanged lines hidden ---