1/* 2 * Copyright (c) 2012-2013, 2015-2016 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 214 unchanged lines hidden (view full) --- 223 * 224 * @return Whether we should allocate on a fill or not 225 */ 226 virtual bool allocOnFill(MemCmd cmd) const = 0; 227 228 /** 229 * Write back dirty blocks in the cache using functional accesses. 230 */ |
231 virtual void memWriteback() override = 0; |
232 /** 233 * Invalidates all blocks in the cache. 234 * 235 * @warn Dirty cache lines will not be written back to 236 * memory. Make sure to call functionalWriteback() first if you 237 * want the to write them to memory. 238 */ |
239 virtual void memInvalidate() override = 0; |
240 /** 241 * Determine if there are any dirty blocks in the cache. 242 * 243 * \return true if at least one block is dirty, false otherwise. 244 */ 245 virtual bool isDirty() const = 0; 246 247 /** --- 207 unchanged lines hidden (view full) --- 455 456 /** 457 * @} 458 */ 459 460 /** 461 * Register stats for this object. 462 */ |
463 virtual void regStats() override; |
464 465 public: 466 BaseCache(const BaseCacheParams *p, unsigned blk_size); 467 ~BaseCache() {} 468 |
469 virtual void init() override; |
470 471 virtual BaseMasterPort &getMasterPort(const std::string &if_name, |
472 PortID idx = InvalidPortID) override; |
473 virtual BaseSlavePort &getSlavePort(const std::string &if_name, |
474 PortID idx = InvalidPortID) override; |
475 476 /** 477 * Query block size of a cache. 478 * @return The block size 479 */ 480 unsigned 481 getBlockSize() const 482 { --- 127 unchanged lines hidden --- |