1/* 2 * Copyright (c) 2012-2013, 2015-2016 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 314 unchanged lines hidden (view full) --- 323 System *system; 324 325 // Statistics 326 /** 327 * @addtogroup CacheStatistics 328 * @{ 329 */ 330 |
331 /** Number of hits per thread for each type of command. 332 @sa Packet::Command */ |
333 Stats::Vector hits[MemCmd::NUM_MEM_CMDS]; 334 /** Number of hits for demand accesses. */ 335 Stats::Formula demandHits; 336 /** Number of hit for all accesses. */ 337 Stats::Formula overallHits; 338 |
339 /** Number of misses per thread for each type of command. 340 @sa Packet::Command */ |
341 Stats::Vector misses[MemCmd::NUM_MEM_CMDS]; 342 /** Number of misses for demand accesses. */ 343 Stats::Formula demandMisses; 344 /** Number of misses for all accesses. */ 345 Stats::Formula overallMisses; 346 347 /** 348 * Total number of cycles per thread/command spent waiting for a miss. --- 261 unchanged lines hidden --- |