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> #include "sim/probe/probe.hh"
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< /**
< * Notify the prefetcher on every access, not just misses.
< */
< const bool prefetchOnAccess;
---
> /** To probe when a cache hit occurs */
> ProbePointArg<PacketPtr> *ppHit;
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> /** To probe when a cache miss occurs */
> ProbePointArg<PacketPtr> *ppMiss;
>
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> /** Registers probes. */
> void regProbePoints() override;
>
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> * Checks if the cache is coalescing writes
> *
> * @return True if the cache is coalescing writes
> */
> bool coalesce() const;
>
>
> /**
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<