1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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199 SlavePacketQueue queue;
200
201 bool blocked;
202
203 bool mustSendRetry;
204
205 private:
206
207 EventWrapper<Port, &Port::sendRetry> sendRetryEvent;
208
209 };
210
211 CacheSlavePort *cpuSidePort;
212 CacheMasterPort *memSidePort;
213
214 protected:
215

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