1/*
2 * Copyright (c) 2012-2013, 2015-2016, 2018 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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490 * make recvTimingResp less cluttered.
491 */
492 void handleUncacheableWriteResp(PacketPtr pkt);
493
494 /**
495 * Service non-deferred MSHR targets using the received response
496 *
497 * Iterates through the list of targets that can be serviced with
498 * the current response. Any writebacks that need to performed
499 * must be appended to the writebacks parameter.
500 *
501 * @param mshr The MSHR that corresponds to the reponse
502 * @param pkt The response packet
503 * @param blk The reference block
504 * @param writebacks List of writebacks that need to be performed
505 */
506 virtual void serviceMSHRTargets(MSHR *mshr, const PacketPtr pkt,
507 CacheBlk *blk, PacketList& writebacks) = 0;
508
509 /**
510 * Handles a response (cache line fill/write ack) from the bus.
511 * @param pkt The response packet
512 */
513 virtual void recvTimingResp(PacketPtr pkt);
514
515 /**

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