1/*
2 * Copyright (c) 2012-2013, 2015-2016 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 470 unchanged lines hidden (view full) ---

479 * @return The block size
480 */
481 unsigned
482 getBlockSize() const
483 {
484 return blkSize;
485 }
486
487
488 Addr blockAlign(Addr addr) const { return (addr & ~(Addr(blkSize - 1))); }
489
490
491 const AddrRangeList &getAddrRanges() const { return addrRanges; }
492
493 MSHR *allocateMissBuffer(PacketPtr pkt, Tick time, bool sched_send = true)
494 {
495 MSHR *mshr = mshrQueue.allocate(blockAlign(pkt->getAddr()), blkSize,
496 pkt, time, order++,
497 allocOnFill(pkt->cmd));
498
499 if (mshrQueue.isFull()) {
500 setBlocked((BlockedCause)MSHRQueue_MSHRs);
501 }
502
503 if (sched_send) {

--- 4 unchanged lines hidden (view full) ---

508 return mshr;
509 }
510
511 void allocateWriteBuffer(PacketPtr pkt, Tick time)
512 {
513 // should only see writes or clean evicts here
514 assert(pkt->isWrite() || pkt->cmd == MemCmd::CleanEvict);
515
516 Addr blk_addr = blockAlign(pkt->getAddr());
517
518 WriteQueueEntry *wq_entry =
519 writeBuffer.findMatch(blk_addr, pkt->isSecure());
520 if (wq_entry && !wq_entry->inService) {
521 DPRINTF(Cache, "Potential to merge writeback %s", pkt->print());
522 }
523
524 writeBuffer.allocate(blk_addr, blkSize, pkt, time, order++);

--- 90 unchanged lines hidden ---