base.cc (9152:86c0e6ca5e7c) | base.cc (9263:066099902102) |
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1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 55 unchanged lines hidden (view full) --- 64} 65 66BaseCache::BaseCache(const Params *p) 67 : MemObject(p), 68 mshrQueue("MSHRs", p->mshrs, 4, MSHRQueue_MSHRs), 69 writeBuffer("write buffer", p->write_buffers, p->mshrs+1000, 70 MSHRQueue_WriteBuffer), 71 blkSize(p->block_size), | 1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 55 unchanged lines hidden (view full) --- 64} 65 66BaseCache::BaseCache(const Params *p) 67 : MemObject(p), 68 mshrQueue("MSHRs", p->mshrs, 4, MSHRQueue_MSHRs), 69 writeBuffer("write buffer", p->write_buffers, p->mshrs+1000, 70 MSHRQueue_WriteBuffer), 71 blkSize(p->block_size), |
72 hitLatency(p->latency), | 72 hitLatency(p->hit_latency), 73 responseLatency(p->response_latency), |
73 numTarget(p->tgts_per_mshr), 74 forwardSnoops(p->forward_snoops), 75 isTopLevel(p->is_top_level), 76 blocked(0), 77 noTargetMSHR(NULL), 78 missCount(p->max_miss_count), 79 drainEvent(NULL), 80 addrRanges(p->addr_ranges.begin(), p->addr_ranges.end()), --- 682 unchanged lines hidden --- | 74 numTarget(p->tgts_per_mshr), 75 forwardSnoops(p->forward_snoops), 76 isTopLevel(p->is_top_level), 77 blocked(0), 78 noTargetMSHR(NULL), 79 missCount(p->max_miss_count), 80 drainEvent(NULL), 81 addrRanges(p->addr_ranges.begin(), p->addr_ranges.end()), --- 682 unchanged lines hidden --- |