base.cc (8711:c7e14f52c682) | base.cc (8736:2d8a57343fe3) |
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1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 30 unchanged lines hidden (view full) --- 39#include "mem/cache/base.hh" 40#include "mem/cache/mshr.hh" 41 42using namespace std; 43 44BaseCache::CachePort::CachePort(const std::string &_name, BaseCache *_cache, 45 const std::string &_label) 46 : SimpleTimingPort(_name, _cache), cache(_cache), | 1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 30 unchanged lines hidden (view full) --- 39#include "mem/cache/base.hh" 40#include "mem/cache/mshr.hh" 41 42using namespace std; 43 44BaseCache::CachePort::CachePort(const std::string &_name, BaseCache *_cache, 45 const std::string &_label) 46 : SimpleTimingPort(_name, _cache), cache(_cache), |
47 label(_label), otherPort(NULL), 48 blocked(false), mustSendRetry(false) | 47 label(_label), blocked(false), mustSendRetry(false) |
49{ 50} 51 52 53BaseCache::BaseCache(const Params *p) 54 : MemObject(p), 55 mshrQueue("MSHRs", p->mshrs, 4, MSHRQueue_MSHRs), 56 writeBuffer("write buffer", p->write_buffers, p->mshrs+1000, --- 7 unchanged lines hidden (view full) --- 64 noTargetMSHR(NULL), 65 missCount(p->max_miss_count), 66 drainEvent(NULL), 67 addrRange(p->addr_range), 68 _numCpus(p->num_cpus) 69{ 70} 71 | 48{ 49} 50 51 52BaseCache::BaseCache(const Params *p) 53 : MemObject(p), 54 mshrQueue("MSHRs", p->mshrs, 4, MSHRQueue_MSHRs), 55 writeBuffer("write buffer", p->write_buffers, p->mshrs+1000, --- 7 unchanged lines hidden (view full) --- 63 noTargetMSHR(NULL), 64 missCount(p->max_miss_count), 65 drainEvent(NULL), 66 addrRange(p->addr_range), 67 _numCpus(p->num_cpus) 68{ 69} 70 |
72void 73BaseCache::CachePort::recvRangeChange() const 74{ 75 otherPort->sendRangeChange(); 76} | |
77 | 71 |
78 | |
79bool 80BaseCache::CachePort::checkFunctional(PacketPtr pkt) 81{ 82 pkt->pushLabel(label); 83 bool done = SimpleTimingPort::checkFunctional(pkt); 84 pkt->popLabel(); 85 return done; 86} --- 562 unchanged lines hidden --- | 72bool 73BaseCache::CachePort::checkFunctional(PacketPtr pkt) 74{ 75 pkt->pushLabel(label); 76 bool done = SimpleTimingPort::checkFunctional(pkt); 77 pkt->popLabel(); 78 return done; 79} --- 562 unchanged lines hidden --- |