base.cc (10815:169af9a2779f) base.cc (10821:581fb2484bd6)
1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 139 unchanged lines hidden (view full) ---

148{
149 if (if_name == "cpu_side") {
150 return *cpuSidePort;
151 } else {
152 return MemObject::getSlavePort(if_name, idx);
153 }
154}
155
1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 139 unchanged lines hidden (view full) ---

148{
149 if (if_name == "cpu_side") {
150 return *cpuSidePort;
151 } else {
152 return MemObject::getSlavePort(if_name, idx);
153 }
154}
155
156bool
157BaseCache::inRange(Addr addr) const
158{
159 for (const auto& r : addrRanges) {
160 if (r.contains(addr)) {
161 return true;
162 }
163 }
164 return false;
165}
166
156void
157BaseCache::regStats()
158{
159 using namespace Stats;
160
161 // Hit statistics
162 for (int access_idx = 0; access_idx < MemCmd::NUM_MEM_CMDS; ++access_idx) {
163 MemCmd cmd(access_idx);

--- 626 unchanged lines hidden --- 		167void
168BaseCache::regStats()
169{
170 using namespace Stats;
171
172 // Hit statistics
173 for (int access_idx = 0; access_idx < MemCmd::NUM_MEM_CMDS; ++access_idx) {
174 MemCmd cmd(access_idx);

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