1/* 2 * Copyright (c) 2012-2013 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 38 unchanged lines hidden (view full) --- 47 48#include "mem/cache/base.hh" 49 50#include "debug/Cache.hh" 51#include "debug/Drain.hh" 52#include "mem/cache/cache.hh" 53#include "mem/cache/mshr.hh" 54#include "mem/cache/tags/fa_lru.hh" |
55#include "sim/full_system.hh" 56 57using namespace std; 58 59BaseCache::CacheSlavePort::CacheSlavePort(const std::string &_name, 60 BaseCache *_cache, 61 const std::string &_label) 62 : QueuedSlavePort(_name, _cache, queue), queue(*_cache, *this, _label), --- 699 unchanged lines hidden --- |