1/*
2 * Copyright (c) 2012-2013, 2018 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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831 // Read requester(s) to have buffered the ReadEx snoop and to
832 // invalidate their blocks after receiving them.
833 // assert(!pkt->needsWritable() || blk->isWritable());
834 assert(pkt->getOffset(blkSize) + pkt->getSize() <= blkSize);
835
836 // Check RMW operations first since both isRead() and
837 // isWrite() will be true for them
838 if (pkt->cmd == MemCmd::SwapReq) {
839 cmpAndSwap(blk, pkt);
840 } else if (pkt->isWrite()) {
841 // we have the block in a writable state and can go ahead,
842 // note that the line may be also be considered writable in
843 // downstream caches along the path to memory, but always
844 // Exclusive, and never Modified
845 assert(blk->isWritable());
846 // Write or WriteLine at the first cache with block in writable state
847 if (blk->checkWrite(pkt)) {

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