1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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778unsigned int
779BaseCache::drain(DrainManager *dm)
780{
781 int count = memSidePort->drain(dm) + cpuSidePort->drain(dm) +
782 mshrQueue.drain(dm) + writeBuffer.drain(dm);
783
784 // Set status
785 if (count != 0) {
786 setDrainState(Drainable::Draining);
787 DPRINTF(Drain, "Cache not drained\n");
788 return count;
789 }
790
791 setDrainState(Drainable::Drained);
792 return 0;
793}
794
795BaseCache *
796BaseCacheParams::create()
797{
798 assert(tags);
799
800 return new Cache(this);
801}