1/*
2 * Copyright (c) 2012-2013, 2018 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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965 mshrQueue.findMatch(pkt->getAddr(), pkt->isSecure())) {
966 DPRINTF(Cache, "Clean writeback %#llx to block with MSHR, "
967 "dropping\n", pkt->getAddr());
968 return true;
969 }
970
971 if (!blk) {
972 // need to do a replacement
973 blk = allocateBlock(pkt, writebacks);
974 if (!blk) {
975 // no replaceable block available: give up, fwd to next level.
976 incMissCount(pkt);
977 return false;
978 }
979
980 blk->status |= (BlkValid | BlkReadable);
981 }
982 // only mark the block dirty if we got a writeback command,
983 // and leave it as is for a clean writeback
984 if (pkt->cmd == MemCmd::WritebackDirty) {
985 // TODO: the coherent cache can assert(!blk->isDirty());
986 blk->status |= BlkDirty;

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1022
1023 if (!blk) {
1024 if (pkt->writeThrough()) {
1025 // if this is a write through packet, we don't try to
1026 // allocate if the block is not present
1027 return false;
1028 } else {
1029 // a writeback that misses needs to allocate a new block
1030 blk = allocateBlock(pkt, writebacks);
1031 if (!blk) {
1032 // no replaceable block available: give up, fwd to
1033 // next level.
1034 incMissCount(pkt);
1035 return false;
1036 }
1037
1038 blk->status |= (BlkValid | BlkReadable);
1039 }
1040 }
1041
1042 // at this point either this is a writeback or a write-through
1043 // write clean operation and the block is already in this
1044 // cache, we need to update the data and the block flags

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1116
1117 // only read responses and write-line requests have data;
1118 // note that we don't write the data here for write-line - that
1119 // happens in the subsequent call to satisfyRequest
1120 assert(pkt->isRead() || pkt->cmd == MemCmd::WriteLineReq);
1121
1122 // need to do a replacement if allocating, otherwise we stick
1123 // with the temporary storage
1124 blk = allocate ? allocateBlock(pkt, writebacks) : nullptr;
1125
1126 if (!blk) {
1127 // No replaceable block or a mostly exclusive
1128 // cache... just use temporary storage to complete the
1129 // current request and then get rid of it
1130 assert(!tempBlock->isValid());
1131 blk = tempBlock;
1132 tempBlock->insert(addr, is_secure);
1133 DPRINTF(Cache, "using temp block for %#llx (%s)\n", addr,
1134 is_secure ? "s" : "ns");
1135 }
1136
1137 // we should never be overwriting a valid block
1138 assert(!blk->isValid());
1139 } else {
1140 // existing block... probably an upgrade
1141 assert(regenerateBlkAddr(blk) == addr);
1142 assert(blk->isSecure() == is_secure);

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1195 // We pay for fillLatency here.
1196 blk->whenReady = clockEdge() + fillLatency * clockPeriod() +
1197 pkt->payloadDelay;
1198
1199 return blk;
1200}
1201
1202CacheBlk*
1203BaseCache::allocateBlock(const PacketPtr pkt, PacketList &writebacks)
1204{
1205 // Get address
1206 const Addr addr = pkt->getAddr();
1207
1208 // Get secure bit
1209 const bool is_secure = pkt->isSecure();
1210
1211 // Find replacement victim
1212 std::vector<CacheBlk*> evict_blks;
1213 CacheBlk *victim = tags->findVictim(addr, is_secure, evict_blks);
1214
1215 // It is valid to return nullptr if there is no victim
1216 if (!victim)
1217 return nullptr;
1218

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1253 if (blk->wasPrefetched()) {
1254 unusedPrefetches++;
1255 }
1256
1257 evictBlock(blk, writebacks);
1258 }
1259 }
1260
1261 // Insert new block at victimized entry
1262 tags->insertBlock(pkt, victim);
1263
1264 return victim;
1265}
1266
1267void
1268BaseCache::invalidateBlock(CacheBlk *blk)
1269{
1270 if (blk != tempBlock)
1271 tags->invalidate(blk);

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