Cache.py (12724:4f6fac3191d2) | Cache.py (12726:850e9965525b) |
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1# Copyright (c) 2012-2013, 2015 ARM Limited | 1# Copyright (c) 2012-2013, 2015, 2018 ARM Limited |
2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated --- 105 unchanged lines hidden (view full) --- 115 # cache a line is dropped for a mostly exclusive cache. 116 clusivity = Param.Clusivity('mostly_incl', 117 "Clusivity with upstream cache") 118 119 120class Cache(BaseCache): 121 type = 'Cache' 122 cxx_header = 'mem/cache/cache.hh' | 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated --- 105 unchanged lines hidden (view full) --- 115 # cache a line is dropped for a mostly exclusive cache. 116 clusivity = Param.Clusivity('mostly_incl', 117 "Clusivity with upstream cache") 118 119 120class Cache(BaseCache): 121 type = 'Cache' 122 cxx_header = 'mem/cache/cache.hh' |
123 124 125class NoncoherentCache(BaseCache): 126 type = 'NoncoherentCache' 127 cxx_header = 'mem/cache/noncoherent_cache.hh' 128 129 # This is typically a last level cache and any clean 130 # writebacks would be unnecessary traffic to the main memory. 131 writeback_clean = False 132 |
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