bridge.cc (9164:d112473185ea) | bridge.cc (9180:ee8d7a51651d) |
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1/* 2 * Copyright (c) 2011-2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 42 unchanged lines hidden (view full) --- 51#include "base/trace.hh" 52#include "debug/Bridge.hh" 53#include "mem/bridge.hh" 54#include "params/Bridge.hh" 55 56Bridge::BridgeSlavePort::BridgeSlavePort(const std::string& _name, 57 Bridge& _bridge, 58 BridgeMasterPort& _masterPort, | 1/* 2 * Copyright (c) 2011-2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 42 unchanged lines hidden (view full) --- 51#include "base/trace.hh" 52#include "debug/Bridge.hh" 53#include "mem/bridge.hh" 54#include "params/Bridge.hh" 55 56Bridge::BridgeSlavePort::BridgeSlavePort(const std::string& _name, 57 Bridge& _bridge, 58 BridgeMasterPort& _masterPort, |
59 int _delay, int _resp_limit, | 59 Cycles _delay, int _resp_limit, |
60 std::vector<Range<Addr> > _ranges) 61 : SlavePort(_name, &_bridge), bridge(_bridge), masterPort(_masterPort), 62 delay(_delay), ranges(_ranges.begin(), _ranges.end()), 63 outstandingResponses(0), retryReq(false), 64 respQueueLimit(_resp_limit), sendEvent(*this) 65{ 66} 67 68Bridge::BridgeMasterPort::BridgeMasterPort(const std::string& _name, 69 Bridge& _bridge, 70 BridgeSlavePort& _slavePort, | 60 std::vector<Range<Addr> > _ranges) 61 : SlavePort(_name, &_bridge), bridge(_bridge), masterPort(_masterPort), 62 delay(_delay), ranges(_ranges.begin(), _ranges.end()), 63 outstandingResponses(0), retryReq(false), 64 respQueueLimit(_resp_limit), sendEvent(*this) 65{ 66} 67 68Bridge::BridgeMasterPort::BridgeMasterPort(const std::string& _name, 69 Bridge& _bridge, 70 BridgeSlavePort& _slavePort, |
71 int _delay, int _req_limit) | 71 Cycles _delay, int _req_limit) |
72 : MasterPort(_name, &_bridge), bridge(_bridge), slavePort(_slavePort), 73 delay(_delay), reqQueueLimit(_req_limit), sendEvent(*this) 74{ 75} 76 77Bridge::Bridge(Params *p) 78 : MemObject(p), | 72 : MasterPort(_name, &_bridge), bridge(_bridge), slavePort(_slavePort), 73 delay(_delay), reqQueueLimit(_req_limit), sendEvent(*this) 74{ 75} 76 77Bridge::Bridge(Params *p) 78 : MemObject(p), |
79 slavePort(p->name + ".slave", *this, masterPort, p->delay, p->resp_size, 80 p->ranges), 81 masterPort(p->name + ".master", *this, slavePort, p->delay, p->req_size) | 79 slavePort(p->name + ".slave", *this, masterPort, 80 ticksToCycles(p->delay), p->resp_size, p->ranges), 81 masterPort(p->name + ".master", *this, slavePort, 82 ticksToCycles(p->delay), p->req_size) |
82{ 83} 84 85MasterPort& 86Bridge::getMasterPort(const std::string &if_name, int idx) 87{ 88 if (if_name == "master") 89 return masterPort; --- 45 unchanged lines hidden (view full) --- 135{ 136 // all checks are done when the request is accepted on the slave 137 // side, so we are guaranteed to have space for the response 138 DPRINTF(Bridge, "recvTimingResp: %s addr 0x%x\n", 139 pkt->cmdString(), pkt->getAddr()); 140 141 DPRINTF(Bridge, "Request queue size: %d\n", transmitList.size()); 142 | 83{ 84} 85 86MasterPort& 87Bridge::getMasterPort(const std::string &if_name, int idx) 88{ 89 if (if_name == "master") 90 return masterPort; --- 45 unchanged lines hidden (view full) --- 136{ 137 // all checks are done when the request is accepted on the slave 138 // side, so we are guaranteed to have space for the response 139 DPRINTF(Bridge, "recvTimingResp: %s addr 0x%x\n", 140 pkt->cmdString(), pkt->getAddr()); 141 142 DPRINTF(Bridge, "Request queue size: %d\n", transmitList.size()); 143 |
143 slavePort.schedTimingResp(pkt, curTick() + delay); | 144 slavePort.schedTimingResp(pkt, bridge.clockEdge(delay)); |
144 145 return true; 146} 147 148bool 149Bridge::BridgeSlavePort::recvTimingReq(PacketPtr pkt) 150{ 151 DPRINTF(Bridge, "recvTimingReq: %s addr 0x%x\n", --- 13 unchanged lines hidden (view full) --- 165 if (respQueueFull()) { 166 DPRINTF(Bridge, "Response queue full\n"); 167 retryReq = true; 168 } else { 169 DPRINTF(Bridge, "Reserving space for response\n"); 170 assert(outstandingResponses != respQueueLimit); 171 ++outstandingResponses; 172 retryReq = false; | 145 146 return true; 147} 148 149bool 150Bridge::BridgeSlavePort::recvTimingReq(PacketPtr pkt) 151{ 152 DPRINTF(Bridge, "recvTimingReq: %s addr 0x%x\n", --- 13 unchanged lines hidden (view full) --- 166 if (respQueueFull()) { 167 DPRINTF(Bridge, "Response queue full\n"); 168 retryReq = true; 169 } else { 170 DPRINTF(Bridge, "Reserving space for response\n"); 171 assert(outstandingResponses != respQueueLimit); 172 ++outstandingResponses; 173 retryReq = false; |
173 masterPort.schedTimingReq(pkt, curTick() + delay); | 174 masterPort.schedTimingReq(pkt, bridge.clockEdge(delay)); |
174 } 175 } 176 177 // remember that we are now stalling a packet and that we have to 178 // tell the sending master to retry once space becomes available, 179 // we make no distinction whether the stalling is due to the 180 // request queue or response queue being full 181 return !retryReq; --- 165 unchanged lines hidden (view full) --- 347 trySendTiming(); 348 else 349 bridge.schedule(sendEvent, nextReady); 350} 351 352Tick 353Bridge::BridgeSlavePort::recvAtomic(PacketPtr pkt) 354{ | 175 } 176 } 177 178 // remember that we are now stalling a packet and that we have to 179 // tell the sending master to retry once space becomes available, 180 // we make no distinction whether the stalling is due to the 181 // request queue or response queue being full 182 return !retryReq; --- 165 unchanged lines hidden (view full) --- 348 trySendTiming(); 349 else 350 bridge.schedule(sendEvent, nextReady); 351} 352 353Tick 354Bridge::BridgeSlavePort::recvAtomic(PacketPtr pkt) 355{ |
355 return delay + masterPort.sendAtomic(pkt); | 356 return delay * bridge.clockPeriod() + masterPort.sendAtomic(pkt); |
356} 357 358void 359Bridge::BridgeSlavePort::recvFunctional(PacketPtr pkt) 360{ 361 std::list<DeferredPacket>::iterator i; 362 363 pkt->pushLabel(name()); --- 48 unchanged lines hidden --- | 357} 358 359void 360Bridge::BridgeSlavePort::recvFunctional(PacketPtr pkt) 361{ 362 std::list<DeferredPacket>::iterator i; 363 364 pkt->pushLabel(name()); --- 48 unchanged lines hidden --- |