abstract_mem.cc (8992:e68dd2ba4fa4) abstract_mem.cc (9053:9cad1c26c3b3)
1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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55#include <string>
56
57#include "arch/registers.hh"
58#include "config/the_isa.hh"
59#include "debug/LLSC.hh"
60#include "debug/MemoryAccess.hh"
61#include "mem/abstract_mem.hh"
62#include "mem/packet_access.hh"
1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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55#include <string>
56
57#include "arch/registers.hh"
58#include "config/the_isa.hh"
59#include "debug/LLSC.hh"
60#include "debug/MemoryAccess.hh"
61#include "mem/abstract_mem.hh"
62#include "mem/packet_access.hh"
63#include "sim/system.hh"
63
64using namespace std;
65
66AbstractMemory::AbstractMemory(const Params *p) :
67 MemObject(p), range(params()->range), pmemAddr(NULL),
64
65using namespace std;
66
67AbstractMemory::AbstractMemory(const Params *p) :
68 MemObject(p), range(params()->range), pmemAddr(NULL),
68 confTableReported(p->conf_table_reported), inAddrMap(p->in_addr_map)
69 confTableReported(p->conf_table_reported), inAddrMap(p->in_addr_map),
70 _system(NULL)
69{
70 if (size() % TheISA::PageBytes != 0)
71 panic("Memory Size not divisible by page size\n");
72
73 if (params()->null)
74 return;
75
76 if (params()->file == "") {

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111 munmap((char*)pmemAddr, size());
112}
113
114void
115AbstractMemory::regStats()
116{
117 using namespace Stats;
118
71{
72 if (size() % TheISA::PageBytes != 0)
73 panic("Memory Size not divisible by page size\n");
74
75 if (params()->null)
76 return;
77
78 if (params()->file == "") {

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113 munmap((char*)pmemAddr, size());
114}
115
116void
117AbstractMemory::regStats()
118{
119 using namespace Stats;
120
121 assert(system());
122
119 bytesRead
123 bytesRead
124 .init(system()->maxMasters())
120 .name(name() + ".bytes_read")
121 .desc("Number of bytes read from this memory")
125 .name(name() + ".bytes_read")
126 .desc("Number of bytes read from this memory")
127 .flags(total | nozero | nonan)
122 ;
128 ;
129 for (int i = 0; i < system()->maxMasters(); i++) {
130 bytesRead.subname(i, system()->getMasterName(i));
131 }
123 bytesInstRead
132 bytesInstRead
133 .init(system()->maxMasters())
124 .name(name() + ".bytes_inst_read")
125 .desc("Number of instructions bytes read from this memory")
134 .name(name() + ".bytes_inst_read")
135 .desc("Number of instructions bytes read from this memory")
136 .flags(total | nozero | nonan)
126 ;
137 ;
138 for (int i = 0; i < system()->maxMasters(); i++) {
139 bytesInstRead.subname(i, system()->getMasterName(i));
140 }
127 bytesWritten
141 bytesWritten
142 .init(system()->maxMasters())
128 .name(name() + ".bytes_written")
129 .desc("Number of bytes written to this memory")
143 .name(name() + ".bytes_written")
144 .desc("Number of bytes written to this memory")
145 .flags(total | nozero | nonan)
130 ;
146 ;
147 for (int i = 0; i < system()->maxMasters(); i++) {
148 bytesWritten.subname(i, system()->getMasterName(i));
149 }
131 numReads
150 numReads
151 .init(system()->maxMasters())
132 .name(name() + ".num_reads")
133 .desc("Number of read requests responded to by this memory")
152 .name(name() + ".num_reads")
153 .desc("Number of read requests responded to by this memory")
154 .flags(total | nozero | nonan)
134 ;
155 ;
156 for (int i = 0; i < system()->maxMasters(); i++) {
157 numReads.subname(i, system()->getMasterName(i));
158 }
135 numWrites
159 numWrites
160 .init(system()->maxMasters())
136 .name(name() + ".num_writes")
137 .desc("Number of write requests responded to by this memory")
161 .name(name() + ".num_writes")
162 .desc("Number of write requests responded to by this memory")
163 .flags(total | nozero | nonan)
138 ;
164 ;
165 for (int i = 0; i < system()->maxMasters(); i++) {
166 numWrites.subname(i, system()->getMasterName(i));
167 }
139 numOther
168 numOther
169 .init(system()->maxMasters())
140 .name(name() + ".num_other")
141 .desc("Number of other requests responded to by this memory")
170 .name(name() + ".num_other")
171 .desc("Number of other requests responded to by this memory")
172 .flags(total | nozero | nonan)
142 ;
173 ;
174 for (int i = 0; i < system()->maxMasters(); i++) {
175 numOther.subname(i, system()->getMasterName(i));
176 }
143 bwRead
144 .name(name() + ".bw_read")
145 .desc("Total read bandwidth from this memory (bytes/s)")
146 .precision(0)
147 .prereq(bytesRead)
177 bwRead
178 .name(name() + ".bw_read")
179 .desc("Total read bandwidth from this memory (bytes/s)")
180 .precision(0)
181 .prereq(bytesRead)
182 .flags(total | nozero | nonan)
148 ;
183 ;
184 for (int i = 0; i < system()->maxMasters(); i++) {
185 bwRead.subname(i, system()->getMasterName(i));
186 }
187
149 bwInstRead
150 .name(name() + ".bw_inst_read")
151 .desc("Instruction read bandwidth from this memory (bytes/s)")
152 .precision(0)
153 .prereq(bytesInstRead)
188 bwInstRead
189 .name(name() + ".bw_inst_read")
190 .desc("Instruction read bandwidth from this memory (bytes/s)")
191 .precision(0)
192 .prereq(bytesInstRead)
193 .flags(total | nozero | nonan)
154 ;
194 ;
195 for (int i = 0; i < system()->maxMasters(); i++) {
196 bwInstRead.subname(i, system()->getMasterName(i));
197 }
155 bwWrite
156 .name(name() + ".bw_write")
157 .desc("Write bandwidth from this memory (bytes/s)")
158 .precision(0)
159 .prereq(bytesWritten)
198 bwWrite
199 .name(name() + ".bw_write")
200 .desc("Write bandwidth from this memory (bytes/s)")
201 .precision(0)
202 .prereq(bytesWritten)
203 .flags(total | nozero | nonan)
160 ;
204 ;
205 for (int i = 0; i < system()->maxMasters(); i++) {
206 bwWrite.subname(i, system()->getMasterName(i));
207 }
161 bwTotal
162 .name(name() + ".bw_total")
163 .desc("Total bandwidth to/from this memory (bytes/s)")
164 .precision(0)
165 .prereq(bwTotal)
208 bwTotal
209 .name(name() + ".bw_total")
210 .desc("Total bandwidth to/from this memory (bytes/s)")
211 .precision(0)
212 .prereq(bwTotal)
213 .flags(total | nozero | nonan)
166 ;
214 ;
215 for (int i = 0; i < system()->maxMasters(); i++) {
216 bwTotal.subname(i, system()->getMasterName(i));
217 }
167 bwRead = bytesRead / simSeconds;
168 bwInstRead = bytesInstRead / simSeconds;
169 bwWrite = bytesWritten / simSeconds;
170 bwTotal = (bytesRead + bytesWritten) / simSeconds;
171}
172
173Range<Addr>
174AbstractMemory::getAddrRange()

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331 panic("Invalid size for conditional read/write\n");
332 }
333
334 if (overwrite_mem)
335 std::memcpy(hostAddr, &overwrite_val, pkt->getSize());
336
337 assert(!pkt->req->isInstFetch());
338 TRACE_PACKET("Read/Write");
218 bwRead = bytesRead / simSeconds;
219 bwInstRead = bytesInstRead / simSeconds;
220 bwWrite = bytesWritten / simSeconds;
221 bwTotal = (bytesRead + bytesWritten) / simSeconds;
222}
223
224Range<Addr>
225AbstractMemory::getAddrRange()

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382 panic("Invalid size for conditional read/write\n");
383 }
384
385 if (overwrite_mem)
386 std::memcpy(hostAddr, &overwrite_val, pkt->getSize());
387
388 assert(!pkt->req->isInstFetch());
389 TRACE_PACKET("Read/Write");
339 numOther++;
390 numOther[pkt->req->masterId()]++;
340 } else if (pkt->isRead()) {
341 assert(!pkt->isWrite());
342 if (pkt->isLLSC()) {
343 trackLoadLocked(pkt);
344 }
345 if (pmemAddr)
346 memcpy(pkt->getPtr<uint8_t>(), hostAddr, pkt->getSize());
347 TRACE_PACKET(pkt->req->isInstFetch() ? "IFetch" : "Read");
391 } else if (pkt->isRead()) {
392 assert(!pkt->isWrite());
393 if (pkt->isLLSC()) {
394 trackLoadLocked(pkt);
395 }
396 if (pmemAddr)
397 memcpy(pkt->getPtr<uint8_t>(), hostAddr, pkt->getSize());
398 TRACE_PACKET(pkt->req->isInstFetch() ? "IFetch" : "Read");
348 numReads++;
349 bytesRead += pkt->getSize();
399 numReads[pkt->req->masterId()]++;
400 bytesRead[pkt->req->masterId()] += pkt->getSize();
350 if (pkt->req->isInstFetch())
401 if (pkt->req->isInstFetch())
351 bytesInstRead += pkt->getSize();
402 bytesInstRead[pkt->req->masterId()] += pkt->getSize();
352 } else if (pkt->isWrite()) {
353 if (writeOK(pkt)) {
354 if (pmemAddr)
355 memcpy(hostAddr, pkt->getPtr<uint8_t>(), pkt->getSize());
356 assert(!pkt->req->isInstFetch());
357 TRACE_PACKET("Write");
403 } else if (pkt->isWrite()) {
404 if (writeOK(pkt)) {
405 if (pmemAddr)
406 memcpy(hostAddr, pkt->getPtr<uint8_t>(), pkt->getSize());
407 assert(!pkt->req->isInstFetch());
408 TRACE_PACKET("Write");
358 numWrites++;
359 bytesWritten += pkt->getSize();
409 numWrites[pkt->req->masterId()]++;
410 bytesWritten[pkt->req->masterId()] += pkt->getSize();
360 }
361 } else if (pkt->isInvalidate()) {
362 // no need to do anything
363 } else {
364 panic("unimplemented");
365 }
366
367 if (pkt->needsResponse()) {

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412 } else if (pkt->isInvalidate()) {
413 // no need to do anything
414 } else {
415 panic("unimplemented");
416 }
417
418 if (pkt->needsResponse()) {

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