abstract_mem.cc (11793:ef606668d247) abstract_mem.cc (12218:8c5db15dc8e7)
1/*
1/*
2 * Copyright (c) 2010-2012 ARM Limited
2 * Copyright (c) 2010-2012,2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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41 * Ali Saidi
42 * Andreas Hansson
43 */
44
45#include "mem/abstract_mem.hh"
46
47#include <vector>
48
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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41 * Ali Saidi
42 * Andreas Hansson
43 */
44
45#include "mem/abstract_mem.hh"
46
47#include <vector>
48
49#include "arch/locked_mem.hh"
49#include "cpu/base.hh"
50#include "cpu/thread_context.hh"
51#include "debug/LLSC.hh"
52#include "debug/MemoryAccess.hh"
53#include "mem/packet_access.hh"
54#include "sim/system.hh"
55
56using namespace std;

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267 // We write address paddr. However, there may be several entries with a
268 // reservation on this address (for other contextIds) and they must all
269 // be removed.
270 i = lockedAddrList.begin();
271 while (i != lockedAddrList.end()) {
272 if (i->addr == paddr) {
273 DPRINTF(LLSC, "Erasing lock record: context %d addr %#x\n",
274 i->contextId, paddr);
50#include "cpu/base.hh"
51#include "cpu/thread_context.hh"
52#include "debug/LLSC.hh"
53#include "debug/MemoryAccess.hh"
54#include "mem/packet_access.hh"
55#include "sim/system.hh"
56
57using namespace std;

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268 // We write address paddr. However, there may be several entries with a
269 // reservation on this address (for other contextIds) and they must all
270 // be removed.
271 i = lockedAddrList.begin();
272 while (i != lockedAddrList.end()) {
273 if (i->addr == paddr) {
274 DPRINTF(LLSC, "Erasing lock record: context %d addr %#x\n",
275 i->contextId, paddr);
275 // For ARM, a spinlock would typically include a Wait
276 // For Event (WFE) to conserve energy. The ARMv8
277 // architecture specifies that an event is
278 // automatically generated when clearing the exclusive
279 // monitor to wake up the processor in WFE.
280 ThreadContext* ctx = system()->getThreadContext(i->contextId);
281 ctx->getCpuPtr()->wakeup(ctx->threadId());
276 ContextID owner_cid = i->contextId;
277 ContextID requester_cid = pkt->req->contextId();
278 if (owner_cid != requester_cid) {
279 ThreadContext* ctx = system()->getThreadContext(owner_cid);
280 TheISA::globalClearExclusive(ctx);
281 }
282 i = lockedAddrList.erase(i);
283 } else {
284 i++;
285 }
286 }
287 }
288
289 return allowStore;

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382
383 assert(!pkt->req->isInstFetch());
384 TRACE_PACKET("Read/Write");
385 numOther[pkt->req->masterId()]++;
386 }
387 } else if (pkt->isRead()) {
388 assert(!pkt->isWrite());
389 if (pkt->isLLSC()) {
282 i = lockedAddrList.erase(i);
283 } else {
284 i++;
285 }
286 }
287 }
288
289 return allowStore;

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382
383 assert(!pkt->req->isInstFetch());
384 TRACE_PACKET("Read/Write");
385 numOther[pkt->req->masterId()]++;
386 }
387 } else if (pkt->isRead()) {
388 assert(!pkt->isWrite());
389 if (pkt->isLLSC()) {
390 assert(!pkt->fromCache());
391 // if the packet is not coming from a cache then we have
392 // to do the LL/SC tracking here
390 trackLoadLocked(pkt);
391 }
392 if (pmemAddr)
393 memcpy(pkt->getPtr<uint8_t>(), hostAddr, pkt->getSize());
394 TRACE_PACKET(pkt->req->isInstFetch() ? "IFetch" : "Read");
395 numReads[pkt->req->masterId()]++;
396 bytesRead[pkt->req->masterId()] += pkt->getSize();
397 if (pkt->req->isInstFetch())

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393 trackLoadLocked(pkt);
394 }
395 if (pmemAddr)
396 memcpy(pkt->getPtr<uint8_t>(), hostAddr, pkt->getSize());
397 TRACE_PACKET(pkt->req->isInstFetch() ? "IFetch" : "Read");
398 numReads[pkt->req->masterId()]++;
399 bytesRead[pkt->req->masterId()] += pkt->getSize();
400 if (pkt->req->isInstFetch())

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