1# Copyright (c) 2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
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44from m5.params import *
45from m5.proxy import *
46from m5.SimObject import SimObject
47
48class BaseXBar(MemObject):
49 type = 'BaseXBar'
50 abstract = True
51 cxx_header = "mem/xbar.hh"
52 slave = VectorSlavePort("vector port for connecting masters")
53 master = VectorMasterPort("vector port for connecting slaves")
54 header_cycles = Param.Cycles(1, "cycles of overhead per transaction")
55 width = Param.Unsigned(8, "xbar width (bytes)")
56
57 # The default port can be left unconnected, or be used to connect
58 # a default slave port
59 default = MasterPort("Port for connecting an optional default slave")
60
61 # The default port can be used unconditionally, or based on
62 # address range, in which case it may overlap with other
63 # ports. The default range is always checked first, thus creating
64 # a two-level hierarchical lookup. This is useful e.g. for the PCI
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69class NoncoherentXBar(BaseXBar):
70 type = 'NoncoherentXBar'
71 cxx_header = "mem/noncoherent_xbar.hh"
72
73class CoherentXBar(BaseXBar):
74 type = 'CoherentXBar'
75 cxx_header = "mem/coherent_xbar.hh"
76
77 system = Param.System(Parent.any, "System that the crossbar belongs to.")
78 snoop_filter = Param.SnoopFilter(NULL, "Selected snoop filter.")
79
80class SnoopFilter(SimObject):
81 type = 'SnoopFilter'
82 cxx_header = "mem/snoop_filter.hh"
83 lookup_latency = Param.Cycles(3, "lookup latency (cycles)")
84
85 system = Param.System(Parent.any, "System that the crossbar belongs to.")
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
--- 34 unchanged lines hidden (view full) ---
44from m5.params import *
45from m5.proxy import *
46from m5.SimObject import SimObject
47
48class BaseXBar(MemObject):
49 type = 'BaseXBar'
50 abstract = True
51 cxx_header = "mem/xbar.hh"
52 slave = VectorSlavePort("vector port for connecting masters")
53 master = VectorMasterPort("vector port for connecting slaves")
54 header_cycles = Param.Cycles(1, "cycles of overhead per transaction")
55 width = Param.Unsigned(8, "xbar width (bytes)")
56
57 # The default port can be left unconnected, or be used to connect
58 # a default slave port
59 default = MasterPort("Port for connecting an optional default slave")
60
61 # The default port can be used unconditionally, or based on
62 # address range, in which case it may overlap with other
63 # ports. The default range is always checked first, thus creating
64 # a two-level hierarchical lookup. This is useful e.g. for the PCI
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69class NoncoherentXBar(BaseXBar):
70 type = 'NoncoherentXBar'
71 cxx_header = "mem/noncoherent_xbar.hh"
72
73class CoherentXBar(BaseXBar):
74 type = 'CoherentXBar'
75 cxx_header = "mem/coherent_xbar.hh"
76
77 system = Param.System(Parent.any, "System that the crossbar belongs to.")
78 snoop_filter = Param.SnoopFilter(NULL, "Selected snoop filter.")
79
80class SnoopFilter(SimObject):
81 type = 'SnoopFilter'
82 cxx_header = "mem/snoop_filter.hh"
83 lookup_latency = Param.Cycles(3, "lookup latency (cycles)")
84
85 system = Param.System(Parent.any, "System that the crossbar belongs to.")