SerialLink.py (13665:9c7fe3811b88) | SerialLink.py (13892:0182a0601f66) |
---|---|
1# Copyright (c) 2012-2013 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 28 unchanged lines hidden (view full) --- 37# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39# 40# Authors: Ali Saidi 41# Andreas Hansson 42# Erfan Azarkhish 43 44from m5.params import * | 1# Copyright (c) 2012-2013 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 28 unchanged lines hidden (view full) --- 37# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39# 40# Authors: Ali Saidi 41# Andreas Hansson 42# Erfan Azarkhish 43 44from m5.params import * |
45from m5.objects.MemObject import MemObject | 45from m5.objects.ClockedObject import ClockedObject |
46 47# SerialLink is a simple variation of the Bridge class, with the ability to 48# account for the latency of packet serialization. 49 | 46 47# SerialLink is a simple variation of the Bridge class, with the ability to 48# account for the latency of packet serialization. 49 |
50class SerialLink(MemObject): | 50class SerialLink(ClockedObject): |
51 type = 'SerialLink' 52 cxx_header = "mem/serial_link.hh" 53 slave = SlavePort('Slave port') 54 master = MasterPort('Master port') 55 req_size = Param.Unsigned(16, "The number of requests to buffer") 56 resp_size = Param.Unsigned(16, "The number of responses to buffer") 57 delay = Param.Latency('0ns', "The latency of this serial_link") 58 ranges = VectorParam.AddrRange([AllMemory], 59 "Address ranges to pass through the serial_link") 60 # Bandwidth of the serial link is determined by the clock domain which the 61 # link belongs to and the number of lanes: 62 num_lanes = Param.Unsigned(1, "Number of parallel lanes inside the serial" 63 "link. (aka. lane width)") 64 link_speed = Param.UInt64(1, "Gb/s Speed of each parallel lane inside the" 65 "serial link. (aka. lane speed)") | 51 type = 'SerialLink' 52 cxx_header = "mem/serial_link.hh" 53 slave = SlavePort('Slave port') 54 master = MasterPort('Master port') 55 req_size = Param.Unsigned(16, "The number of requests to buffer") 56 resp_size = Param.Unsigned(16, "The number of responses to buffer") 57 delay = Param.Latency('0ns', "The latency of this serial_link") 58 ranges = VectorParam.AddrRange([AllMemory], 59 "Address ranges to pass through the serial_link") 60 # Bandwidth of the serial link is determined by the clock domain which the 61 # link belongs to and the number of lanes: 62 num_lanes = Param.Unsigned(1, "Number of parallel lanes inside the serial" 63 "link. (aka. lane width)") 64 link_speed = Param.UInt64(1, "Gb/s Speed of each parallel lane inside the" 65 "serial link. (aka. lane speed)") |