124a125,133
> # For power modelling we need to know if the DRAM has a DLL or not
> dll = Param.Bool(True, "DRAM has DLL or not")
>
> # DRAMPower provides in addition to the core power, the possibility to
> # include RD/WR termination and IO power. This calculation assumes some
> # default values. The integration of DRAMPower with gem5 does not include
> # IO and RD/WR termination power by default. This might be added as an
> # additional feature in the future.
>
195a205,217
> # time to exit power-down mode
> # Exit power-down to next valid command delay
> tXP = Param.Latency("0ns", "Power-up Delay")
>
> # Exit Powerdown to commands requiring a locked DLL
> tXPDLL = Param.Latency("0ns", "Power-up Delay with locked DLL")
>
> # time to exit self-refresh mode
> tXS = Param.Latency("0ns", "Self-refresh exit latency")
>
> # time to exit self-refresh mode with locked DLL
> tXSDLL = Param.Latency("0ns", "Self-refresh exit latency DLL")
>
200a223,303
> # Power Behaviour and Constraints
> # DRAMs like LPDDR and WideIO have 2 external voltage domains. These are
> # defined as VDD and VDD2. Each current is defined for each voltage domain
> # separately. For example, current IDD0 is active-precharge current for
> # voltage domain VDD and current IDD02 is active-precharge current for
> # voltage domain VDD2.
> # By default all currents are set to 0mA. Users who are only interested in
> # the performance of DRAMs can leave them at 0.
>
> # Operating 1 Bank Active-Precharge current
> IDD0 = Param.Current("0mA", "Active precharge current")
>
> # Operating 1 Bank Active-Precharge current multiple voltage Range
> IDD02 = Param.Current("0mA", "Active precharge current VDD2")
>
> # Precharge Power-down Current: Slow exit
> IDD2P0 = Param.Current("0mA", "Precharge Powerdown slow")
>
> # Precharge Power-down Current: Slow exit multiple voltage Range
> IDD2P02 = Param.Current("0mA", "Precharge Powerdown slow VDD2")
>
> # Precharge Power-down Current: Fast exit
> IDD2P1 = Param.Current("0mA", "Precharge Powerdown fast")
>
> # Precharge Power-down Current: Fast exit multiple voltage Range
> IDD2P12 = Param.Current("0mA", "Precharge Powerdown fast VDD2")
>
> # Precharge Standby current
> IDD2N = Param.Current("0mA", "Precharge Standby current")
>
> # Precharge Standby current multiple voltage range
> IDD2N2 = Param.Current("0mA", "Precharge Standby current VDD2")
>
> # Active Power-down current: slow exit
> IDD3P0 = Param.Current("0mA", "Active Powerdown slow")
>
> # Active Power-down current: slow exit multiple voltage range
> IDD3P02 = Param.Current("0mA", "Active Powerdown slow VDD2")
>
> # Active Power-down current : fast exit
> IDD3P1 = Param.Current("0mA", "Active Powerdown fast")
>
> # Active Power-down current : fast exit multiple voltage range
> IDD3P12 = Param.Current("0mA", "Active Powerdown fast VDD2")
>
> # Active Standby current
> IDD3N = Param.Current("0mA", "Active Standby current")
>
> # Active Standby current multiple voltage range
> IDD3N2 = Param.Current("0mA", "Active Standby current VDD2")
>
> # Burst Read Operating Current
> IDD4R = Param.Current("0mA", "READ current")
>
> # Burst Read Operating Current multiple voltage range
> IDD4R2 = Param.Current("0mA", "READ current VDD2")
>
> # Burst Write Operating Current
> IDD4W = Param.Current("0mA", "WRITE current")
>
> # Burst Write Operating Current multiple voltage range
> IDD4W2 = Param.Current("0mA", "WRITE current VDD2")
>
> # Refresh Current
> IDD5 = Param.Current("0mA", "Refresh current")
>
> # Refresh Current multiple voltage range
> IDD52 = Param.Current("0mA", "Refresh current VDD2")
>
> # Self-Refresh Current
> IDD6 = Param.Current("0mA", "Self-refresh Current")
>
> # Self-Refresh Current multiple voltage range
> IDD62 = Param.Current("0mA", "Self-refresh Current VDD2")
>
> # Main voltage range of the DRAM
> VDD = Param.Voltage("0V", "Main Voltage Range")
>
> # Second voltage range defined by some DRAMs
> VDD2 = Param.Voltage("0V", "2nd Voltage Range")
>
203c306
< # an 8x8 configuration, amounting to 4 Gbyte of memory.
---
> # an 8x8 configuration.
255a359,367
> # Current values from datasheet
> IDD0 = '75mA'
> IDD2N = '50mA'
> IDD3N = '57mA'
> IDD4W = '165mA'
> IDD4R = '187mA'
> IDD5 = '220mA'
> VDD = '1.5V'
>
274a387,395
> # Current values from datasheet
> IDD0 = '70mA'
> IDD2N = '37mA'
> IDD3N = '44mA'
> IDD4W = '157mA'
> IDD4R = '191mA'
> IDD5 = '250mA'
> VDD = '1.5V'
>
276,277c397,398
< # timings based on a DDR4-2400 4 Gbit datasheet (Samsung K4A4G085WD)
< # in an 8x8 configuration, amounting to 4 Gbyte of memory.
---
> # timings based on a DDR4-2400 4 Gbit datasheet (Micron MT40A512M8)
> # in an 8x8 configuration.
291,292c412,413
< # Use a single rank
< ranks_per_channel = 1
---
> # Match our DDR3 configurations which is dual rank
> ranks_per_channel = 2
332c453
< tRFC = '260ns'
---
> tRFC = '350ns'
350a472,483
> # Current values from datasheet
> IDD0 = '64mA'
> IDD02 = '4mA'
> IDD2N = '50mA'
> IDD3N = '67mA'
> IDD3N2 = '3mA'
> IDD4W = '180mA'
> IDD4R = '160mA'
> IDD5 = '192mA'
> VDD = '1.2V'
> VDD2 = '2.5V'
>
352,353c485,486
< # default timings based on a LPDDR2-1066 4 Gbit part in a 1x32
< # configuration.
---
> # default timings based on a LPDDR2-1066 4 Gbit part (Micron MT42L128M32D1)
> # in a 1x32 configuration.
354a488,490
> # No DLL in LPDDR2
> dll = False
>
389,390c525
< # 6 CK read to precharge delay
< tRTP = '11.256ns'
---
> tRTP = '7.5ns'
417a553,568
> # Current values from datasheet
> IDD0 = '15mA'
> IDD02 = '70mA'
> IDD2N = '2mA'
> IDD2N2 = '30mA'
> IDD3N = '2.5mA'
> IDD3N2 = '30mA'
> IDD4W = '10mA'
> IDD4W2 = '190mA'
> IDD4R = '3mA'
> IDD4R2 = '220mA'
> IDD5 = '40mA'
> IDD52 = '150mA'
> VDD = '1.8V'
> VDD2 = '1.2V'
>
420a572,574
> # No DLL for WideIO
> dll = False
>
477a632,633
> # The WideIO specification does not provide current information
>
479,480c635,636
< # default timings based on a LPDDR3-1600 4 Gbit part in a 1x32
< # configuration
---
> # default timings based on a LPDDR3-1600 4 Gbit part (Micron
> # EDF8132A1MC) in a 1x32 configuration.
481a638,640
> # No DLL for LPDDR3
> dll = False
>
494c653,654
< # Use a single rank
---
> # Technically the datasheet is a dual-rank package, but for
> # comparison with the LPDDR2 config we stick to a single rank
503,504c663
< # Fixed at 15 ns
< tRCD = '15ns'
---
> tRCD = '18ns'
515,516c674,675
< # Pre-charge one bank 15 ns (all banks 18 ns)
< tRP = '15ns'
---
> # Pre-charge one bank 18 ns (all banks 21 ns)
> tRP = '18ns'
542a702,717
>
> # Current values from datasheet
> IDD0 = '8mA'
> IDD02 = '60mA'
> IDD2N = '0.8mA'
> IDD2N2 = '26mA'
> IDD3N = '2mA'
> IDD3N2 = '34mA'
> IDD4W = '2mA'
> IDD4W2 = '190mA'
> IDD4R = '2mA'
> IDD4R2 = '230mA'
> IDD5 = '28mA'
> IDD52 = '150mA'
> VDD = '1.8V'
> VDD2 = '1.2V'