DRAMCtrl.py (13665:9c7fe3811b88) | DRAMCtrl.py (14038:8ba13d8b7810) |
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1# Copyright (c) 2012-2018 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 121 unchanged lines hidden (view full) --- 130 # update per memory class when bank group architecture is supported 131 bank_groups_per_rank = Param.Unsigned(0, "Number of bank groups per rank") 132 banks_per_rank = Param.Unsigned("Number of banks per rank") 133 # only used for the address mapping as the controller by 134 # construction is a single channel and multiple controllers have 135 # to be instantiated for a multi-channel configuration 136 channels = Param.Unsigned(1, "Number of channels") 137 | 1# Copyright (c) 2012-2018 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 121 unchanged lines hidden (view full) --- 130 # update per memory class when bank group architecture is supported 131 bank_groups_per_rank = Param.Unsigned(0, "Number of bank groups per rank") 132 banks_per_rank = Param.Unsigned("Number of banks per rank") 133 # only used for the address mapping as the controller by 134 # construction is a single channel and multiple controllers have 135 # to be instantiated for a multi-channel configuration 136 channels = Param.Unsigned(1, "Number of channels") 137 |
138 # Enable DRAM powerdown states if True. This is False by default due to 139 # performance being lower when enabled 140 enable_dram_powerdown = Param.Bool(False, "Enable powerdown states") 141 |
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138 # For power modelling we need to know if the DRAM has a DLL or not 139 dll = Param.Bool(True, "DRAM has DLL or not") 140 141 # DRAMPower provides in addition to the core power, the possibility to 142 # include RD/WR termination and IO power. This calculation assumes some 143 # default values. The integration of DRAMPower with gem5 does not include 144 # IO and RD/WR termination power by default. This might be added as an 145 # additional feature in the future. --- 1052 unchanged lines hidden --- | 142 # For power modelling we need to know if the DRAM has a DLL or not 143 dll = Param.Bool(True, "DRAM has DLL or not") 144 145 # DRAMPower provides in addition to the core power, the possibility to 146 # include RD/WR termination and IO power. This calculation assumes some 147 # default values. The integration of DRAMPower with gem5 does not include 148 # IO and RD/WR termination power by default. This might be added as an 149 # additional feature in the future. --- 1052 unchanged lines hidden --- |