1# Copyright (c) 2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Thomas Grass
37# Andreas Hansson
38
39from m5.params import *
40from MemObject import MemObject
41
42# The communication monitor will most typically be used in combination
43# with periodic dumping and resetting of stats using schedStatEvent
44class CommMonitor(MemObject):
45 type = 'CommMonitor'
| 1# Copyright (c) 2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Thomas Grass
37# Andreas Hansson
38
39from m5.params import *
40from MemObject import MemObject
41
42# The communication monitor will most typically be used in combination
43# with periodic dumping and resetting of stats using schedStatEvent
44class CommMonitor(MemObject):
45 type = 'CommMonitor'
|
| 46 cxx_header = "mem/comm_monitor.hh"
|
46
47 # one port in each direction
48 master = MasterPort("Master port")
49 slave = SlavePort("Slave port")
50
51 # control the sample period window length of this monitor
52 sample_period = Param.Clock("1ms", "Sample period for histograms")
53
54 # for each histogram, set the number of bins and enable the user
55 # to disable the measurement, reads and writes use the same
56 # parameters
57
58 # histogram of burst length of packets (not using sample period)
59 burst_length_bins = Param.Unsigned('20', "# bins in burst length " \
60 "histograms")
61 disable_burst_length_hists = Param.Bool(False, "Disable burst length " \
62 "histograms")
63
64 # bandwidth per sample period
65 bandwidth_bins = Param.Unsigned('20', "# bins in bandwidth histograms")
66 disable_bandwidth_hists = Param.Bool(False, "Disable bandwidth histograms")
67
68 # latency from request to response (not using sample period)
69 latency_bins = Param.Unsigned('20', "# bins in latency histograms")
70 disable_latency_hists = Param.Bool(False, "Disable latency histograms")
71
72 # inter transaction time (ITT) distributions in uniformly sized
73 # bins up to the maximum, independently for read-to-read,
74 # write-to-write and the combined request-to-request that does not
75 # separate read and write requests
76 itt_bins = Param.Unsigned('20', "# bins in ITT distributions")
77 itt_max_bin = Param.Latency('100ns', "Max bin of ITT distributions")
78 disable_itt_dists = Param.Bool(False, "Disable ITT distributions")
79
80 # outstanding requests (that did not yet get a response) per
81 # sample period
82 outstanding_bins = Param.Unsigned('20', "# bins in outstanding " \
83 "requests histograms")
84 disable_outstanding_hists = Param.Bool(False, "Disable outstanding " \
85 "requests histograms")
86
87 # transactions (requests) observed per sample period
88 transaction_bins = Param.Unsigned('20', "# bins in transaction " \
89 "count histograms")
90 disable_transaction_hists = Param.Bool(False, "Disable transaction count " \
91 "histograms")
92
93 # address distributions (heatmaps) with associated address masks
94 # to selectively only look at certain bits of the address
95 read_addr_mask = Param.Addr(MaxAddr, "Address mask for read address")
96 write_addr_mask = Param.Addr(MaxAddr, "Address mask for write address")
97 disable_addr_dists = Param.Bool(True, "Disable address distributions")
| 47
48 # one port in each direction
49 master = MasterPort("Master port")
50 slave = SlavePort("Slave port")
51
52 # control the sample period window length of this monitor
53 sample_period = Param.Clock("1ms", "Sample period for histograms")
54
55 # for each histogram, set the number of bins and enable the user
56 # to disable the measurement, reads and writes use the same
57 # parameters
58
59 # histogram of burst length of packets (not using sample period)
60 burst_length_bins = Param.Unsigned('20', "# bins in burst length " \
61 "histograms")
62 disable_burst_length_hists = Param.Bool(False, "Disable burst length " \
63 "histograms")
64
65 # bandwidth per sample period
66 bandwidth_bins = Param.Unsigned('20', "# bins in bandwidth histograms")
67 disable_bandwidth_hists = Param.Bool(False, "Disable bandwidth histograms")
68
69 # latency from request to response (not using sample period)
70 latency_bins = Param.Unsigned('20', "# bins in latency histograms")
71 disable_latency_hists = Param.Bool(False, "Disable latency histograms")
72
73 # inter transaction time (ITT) distributions in uniformly sized
74 # bins up to the maximum, independently for read-to-read,
75 # write-to-write and the combined request-to-request that does not
76 # separate read and write requests
77 itt_bins = Param.Unsigned('20', "# bins in ITT distributions")
78 itt_max_bin = Param.Latency('100ns', "Max bin of ITT distributions")
79 disable_itt_dists = Param.Bool(False, "Disable ITT distributions")
80
81 # outstanding requests (that did not yet get a response) per
82 # sample period
83 outstanding_bins = Param.Unsigned('20', "# bins in outstanding " \
84 "requests histograms")
85 disable_outstanding_hists = Param.Bool(False, "Disable outstanding " \
86 "requests histograms")
87
88 # transactions (requests) observed per sample period
89 transaction_bins = Param.Unsigned('20', "# bins in transaction " \
90 "count histograms")
91 disable_transaction_hists = Param.Bool(False, "Disable transaction count " \
92 "histograms")
93
94 # address distributions (heatmaps) with associated address masks
95 # to selectively only look at certain bits of the address
96 read_addr_mask = Param.Addr(MaxAddr, "Address mask for read address")
97 write_addr_mask = Param.Addr(MaxAddr, "Address mask for write address")
98 disable_addr_dists = Param.Bool(True, "Disable address distributions")
|