simple_memobj.hh (12338:ae907b0a57c2) simple_memobj.hh (13784:1941dc118243)
1/*
2 * Copyright (c) 2017 Jason Lowe-Power
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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230
231 public:
232
233 /** constructor
234 */
235 SimpleMemobj(SimpleMemobjParams *params);
236
237 /**
1/*
2 * Copyright (c) 2017 Jason Lowe-Power
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 221 unchanged lines hidden (view full) ---

230
231 public:
232
233 /** constructor
234 */
235 SimpleMemobj(SimpleMemobjParams *params);
236
237 /**
238 * Get a master port with a given name and index. This is used at
238 * Get a port with a given name and index. This is used at
239 * binding time and returns a reference to a protocol-agnostic
239 * binding time and returns a reference to a protocol-agnostic
240 * base master port.
240 * port.
241 *
242 * @param if_name Port name
243 * @param idx Index in the case of a VectorPort
244 *
245 * @return A reference to the given port
246 */
241 *
242 * @param if_name Port name
243 * @param idx Index in the case of a VectorPort
244 *
245 * @return A reference to the given port
246 */
247 BaseMasterPort& getMasterPort(const std::string& if_name,
248 PortID idx = InvalidPortID) override;
249
250 /**
251 * Get a slave port with a given name and index. This is used at
252 * binding time and returns a reference to a protocol-agnostic
253 * base master port.
254 *
255 * @param if_name Port name
256 * @param idx Index in the case of a VectorPort
257 *
258 * @return A reference to the given port
259 */
260 BaseSlavePort& getSlavePort(const std::string& if_name,
261 PortID idx = InvalidPortID) override;
247 Port &getPort(const std::string &if_name,
248 PortID idx=InvalidPortID) override;
262};
263
264
265#endif // __LEARNING_GEM5_PART2_SIMPLE_MEMOBJ_HH__
249};
250
251
252#endif // __LEARNING_GEM5_PART2_SIMPLE_MEMOBJ_HH__