simple_cache.hh (12339:1141f798a210) simple_cache.hh (13784:1941dc118243)
1/*
2 * Copyright (c) 2017 Jason Lowe-Power
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 290 unchanged lines hidden (view full) ---

299
300 public:
301
302 /** constructor
303 */
304 SimpleCache(SimpleCacheParams *params);
305
306 /**
1/*
2 * Copyright (c) 2017 Jason Lowe-Power
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 290 unchanged lines hidden (view full) ---

299
300 public:
301
302 /** constructor
303 */
304 SimpleCache(SimpleCacheParams *params);
305
306 /**
307 * Get a master port with a given name and index. This is used at
307 * Get a port with a given name and index. This is used at
308 * binding time and returns a reference to a protocol-agnostic
308 * binding time and returns a reference to a protocol-agnostic
309 * base master port.
309 * port.
310 *
311 * @param if_name Port name
312 * @param idx Index in the case of a VectorPort
313 *
314 * @return A reference to the given port
315 */
310 *
311 * @param if_name Port name
312 * @param idx Index in the case of a VectorPort
313 *
314 * @return A reference to the given port
315 */
316 virtual BaseMasterPort& getMasterPort(const std::string& if_name,
317 PortID idx = InvalidPortID) override;
316 Port &getPort(const std::string &if_name,
317 PortID idx=InvalidPortID) override;
318
319 /**
318
319 /**
320 * Get a slave port with a given name and index. This is used at
321 * binding time and returns a reference to a protocol-agnostic
322 * base master port.
323 *
324 * @param if_name Port name
325 * @param idx Index in the case of a VectorPort
326 *
327 * @return A reference to the given port
328 */
329 virtual BaseSlavePort& getSlavePort(const std::string& if_name,
330 PortID idx = InvalidPortID) override;
331
332 /**
333 * Register the stats
334 */
335 void regStats() override;
336};
337
338
339#endif // __LEARNING_GEM5_SIMPLE_CACHE_SIMPLE_CACHE_HH__
320 * Register the stats
321 */
322 void regStats() override;
323};
324
325
326#endif // __LEARNING_GEM5_SIMPLE_CACHE_SIMPLE_CACHE_HH__