system_events.cc (2716:b9114064d77a) | system_events.cc (3549:91fdf097156a) |
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1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 15 unchanged lines hidden (view full) --- 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Lisa Hsu 29 * Nathan Binkert 30 */ 31 | 1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 15 unchanged lines hidden (view full) --- 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Lisa Hsu 29 * Nathan Binkert 30 */ 31 |
32#include "cpu/base.hh" | 32#include "base/trace.hh" |
33#include "cpu/thread_context.hh" | 33#include "cpu/thread_context.hh" |
34#include "kern/kernel_stats.hh" | |
35#include "kern/system_events.hh" | 34#include "kern/system_events.hh" |
36#include "sim/system.hh" | |
37 38using namespace TheISA; 39 40void 41SkipFuncEvent::process(ThreadContext *tc) 42{ 43 Addr newpc = tc->readIntReg(ReturnAddressReg); 44 45 DPRINTF(PCEvent, "skipping %s: pc=%x, newpc=%x\n", description, 46 tc->readPC(), newpc); 47 48 tc->setPC(newpc); 49 tc->setNextPC(tc->readPC() + sizeof(TheISA::MachInst)); | 35 36using namespace TheISA; 37 38void 39SkipFuncEvent::process(ThreadContext *tc) 40{ 41 Addr newpc = tc->readIntReg(ReturnAddressReg); 42 43 DPRINTF(PCEvent, "skipping %s: pc=%x, newpc=%x\n", description, 44 tc->readPC(), newpc); 45 46 tc->setPC(newpc); 47 tc->setNextPC(tc->readPC() + sizeof(TheISA::MachInst)); |
50/* 51 BranchPred *bp = tc->getCpuPtr()->getBranchPred(); 52 if (bp != NULL) { 53 bp->popRAS(tc->getThreadNum()); 54 } 55*/ | |
56} | 48} |
57 58void 59IdleStartEvent::process(ThreadContext *tc) 60{ 61 if (tc->getKernelStats()) 62 tc->getKernelStats()->setIdleProcess( 63 tc->readMiscReg(AlphaISA::IPR_PALtemp23), tc); 64 remove(); 65} | |