1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 15 unchanged lines hidden (view full) --- 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Lisa Hsu 29 * Nathan Binkert 30 */ 31 |
32#include "base/trace.hh" |
33#include "cpu/thread_context.hh" |
34#include "kern/system_events.hh" |
35 36using namespace TheISA; 37 38void 39SkipFuncEvent::process(ThreadContext *tc) 40{ 41 Addr newpc = tc->readIntReg(ReturnAddressReg); 42 43 DPRINTF(PCEvent, "skipping %s: pc=%x, newpc=%x\n", description, 44 tc->readPC(), newpc); 45 46 tc->setPC(newpc); 47 tc->setNextPC(tc->readPC() + sizeof(TheISA::MachInst)); |
48} |