1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
| 1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 * 28 * Authors: Lisa Hsu 29 * Nathan Binkert
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27 */ 28 29#include "cpu/base.hh" 30#include "cpu/cpu_exec_context.hh" 31#include "kern/kernel_stats.hh" 32#include "kern/system_events.hh" 33#include "sim/system.hh" 34 35using namespace TheISA; 36 37void 38SkipFuncEvent::process(ExecContext *xc) 39{ 40 Addr newpc = xc->readIntReg(ReturnAddressReg); 41 42 DPRINTF(PCEvent, "skipping %s: pc=%x, newpc=%x\n", description, 43 xc->readPC(), newpc); 44 45 xc->setPC(newpc); 46 xc->setNextPC(xc->readPC() + sizeof(TheISA::MachInst)); 47/* 48 BranchPred *bp = xc->getCpuPtr()->getBranchPred(); 49 if (bp != NULL) { 50 bp->popRAS(xc->getThreadNum()); 51 } 52*/ 53} 54 55 56FnEvent::FnEvent(PCEventQueue *q, const std::string &desc, Addr addr, 57 Stats::MainBin *bin) 58 : PCEvent(q, desc, addr), _name(desc), mybin(bin) 59{ 60} 61 62void 63FnEvent::process(ExecContext *xc) 64{ 65 if (xc->misspeculating()) 66 return; 67 68 xc->getSystemPtr()->kernelBinning->call(xc, mybin); 69} 70 71void 72IdleStartEvent::process(ExecContext *xc) 73{
| 30 */ 31 32#include "cpu/base.hh" 33#include "cpu/cpu_exec_context.hh" 34#include "kern/kernel_stats.hh" 35#include "kern/system_events.hh" 36#include "sim/system.hh" 37 38using namespace TheISA; 39 40void 41SkipFuncEvent::process(ExecContext *xc) 42{ 43 Addr newpc = xc->readIntReg(ReturnAddressReg); 44 45 DPRINTF(PCEvent, "skipping %s: pc=%x, newpc=%x\n", description, 46 xc->readPC(), newpc); 47 48 xc->setPC(newpc); 49 xc->setNextPC(xc->readPC() + sizeof(TheISA::MachInst)); 50/* 51 BranchPred *bp = xc->getCpuPtr()->getBranchPred(); 52 if (bp != NULL) { 53 bp->popRAS(xc->getThreadNum()); 54 } 55*/ 56} 57 58 59FnEvent::FnEvent(PCEventQueue *q, const std::string &desc, Addr addr, 60 Stats::MainBin *bin) 61 : PCEvent(q, desc, addr), _name(desc), mybin(bin) 62{ 63} 64 65void 66FnEvent::process(ExecContext *xc) 67{ 68 if (xc->misspeculating()) 69 return; 70 71 xc->getSystemPtr()->kernelBinning->call(xc, mybin); 72} 73 74void 75IdleStartEvent::process(ExecContext *xc) 76{
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74 if (xc->getKernelStats()) 75 xc->getKernelStats()->setIdleProcess( 76 xc->readMiscReg(AlphaISA::IPR_PALtemp23), xc);
| 77 xc->getCpuPtr()->kernelStats->setIdleProcess( 78 xc->readMiscReg(AlphaISA::IPR_PALtemp23), xc);
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77 remove(); 78} 79 80void 81InterruptStartEvent::process(ExecContext *xc) 82{
| 79 remove(); 80} 81 82void 83InterruptStartEvent::process(ExecContext *xc) 84{
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83 if (xc->getKernelStats()) 84 xc->getKernelStats()->mode(Kernel::interrupt, xc);
| 85 xc->getCpuPtr()->kernelStats->mode(Kernel::interrupt, xc);
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85} 86 87void 88InterruptEndEvent::process(ExecContext *xc) 89{ 90 // We go back to kernel, if we are user, inside the rti 91 // pal code we will get switched to user because of the ICM write
| 86} 87 88void 89InterruptEndEvent::process(ExecContext *xc) 90{ 91 // We go back to kernel, if we are user, inside the rti 92 // pal code we will get switched to user because of the ICM write
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92 if (xc->getKernelStats()) 93 xc->getKernelStats()->mode(Kernel::kernel, xc);
| 93 xc->getCpuPtr()->kernelStats->mode(Kernel::kernel, xc);
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94}
| 94}
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