events.cc (11166:9818190de72e) events.cc (11538:55014a40512c)
1/*
1/*
2 * Copyright (c) 2011 ARM Limited
2 * Copyright (c) 2011, 2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Nathan Binkert
41 * Ali Saidi
42 */
43
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

--- 25 unchanged lines hidden (view full) ---

36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Nathan Binkert
41 * Ali Saidi
42 */
43
44#include "kern/linux/events.hh"
45
44#include <sstream>
45
46#include "arch/utility.hh"
46#include <sstream>
47
48#include "arch/utility.hh"
49#include "base/output.hh"
47#include "base/trace.hh"
50#include "base/trace.hh"
51#include "cpu/base.hh"
48#include "cpu/thread_context.hh"
49#include "debug/DebugPrintf.hh"
52#include "cpu/thread_context.hh"
53#include "debug/DebugPrintf.hh"
50#include "kern/linux/events.hh"
54#include "kern/linux/helpers.hh"
51#include "kern/linux/printk.hh"
52#include "kern/system_events.hh"
53#include "sim/arguments.hh"
54#include "sim/pseudo_inst.hh"
55#include "sim/system.hh"
56
57namespace Linux {
58

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89 // __delay and __loop_delay functions. One form involves setting quiesce
90 // time to 0 with the assumption that quiesce will not happen. To avoid
91 // the quiesce handling in this case, only execute the quiesce if time > 0.
92 if (time > 0) {
93 PseudoInst::quiesceNs(tc, time);
94 }
95}
96
55#include "kern/linux/printk.hh"
56#include "kern/system_events.hh"
57#include "sim/arguments.hh"
58#include "sim/pseudo_inst.hh"
59#include "sim/system.hh"
60
61namespace Linux {
62

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93 // __delay and __loop_delay functions. One form involves setting quiesce
94 // time to 0 with the assumption that quiesce will not happen. To avoid
95 // the quiesce handling in this case, only execute the quiesce if time > 0.
96 if (time > 0) {
97 PseudoInst::quiesceNs(tc, time);
98 }
99}
100
101void
102DmesgDumpEvent::process(ThreadContext *tc)
103{
104 StringWrap name(tc->getCpuPtr()->name() + ".dmesg_dump_event");
97
105
106 inform("Dumping kernel dmesg buffer to %s...\n", fname);
107 OutputStream *os = simout.create(fname);
108 dumpDmesg(tc, *os->stream());
109 simout.close(os);
110
111 warn(descr());
112}
113
114void
115KernelPanicEvent::process(ThreadContext *tc)
116{
117 StringWrap name(tc->getCpuPtr()->name() + ".dmesg_dump_event");
118
119 inform("Dumping kernel dmesg buffer to %s...\n", fname);
120 OutputStream *os = simout.create(fname);
121 dumpDmesg(tc, *os->stream());
122 simout.close(os);
123
124 panic(descr());
125}
126
98} // namespace linux
127} // namespace linux