wavefront.hh (11657:5fad5a37d6fc) wavefront.hh (11696:80c30bd0c7d6)
1/*
2 * Copyright (c) 2011-2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * For use for simulation and test purposes only
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:

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37#define __WAVEFRONT_HH__
38
39#include <cassert>
40#include <deque>
41#include <memory>
42#include <stack>
43#include <vector>
44
1/*
2 * Copyright (c) 2011-2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * For use for simulation and test purposes only
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:

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37#define __WAVEFRONT_HH__
38
39#include <cassert>
40#include <deque>
41#include <memory>
42#include <stack>
43#include <vector>
44
45#include "arch/gpu_isa.hh"
45#include "base/misc.hh"
46#include "base/types.hh"
46#include "base/misc.hh"
47#include "base/types.hh"
48#include "config/the_gpu_isa.hh"
47#include "gpu-compute/condition_register_state.hh"
48#include "gpu-compute/lds_state.hh"
49#include "gpu-compute/misc.hh"
50#include "gpu-compute/ndrange.hh"
51#include "params/Wavefront.hh"
52#include "sim/sim_object.hh"
53
54static const int MAX_NUM_INSTS_PER_WF = 12;

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367 void getContext(const void *out);
368
369 /**
370 * Sets the hardware context fromt a stream of bytes
371 * This method is designed for HSAIL execution
372 */
373 void setContext(const void *in);
374
49#include "gpu-compute/condition_register_state.hh"
50#include "gpu-compute/lds_state.hh"
51#include "gpu-compute/misc.hh"
52#include "gpu-compute/ndrange.hh"
53#include "params/Wavefront.hh"
54#include "sim/sim_object.hh"
55
56static const int MAX_NUM_INSTS_PER_WF = 12;

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369 void getContext(const void *out);
370
371 /**
372 * Sets the hardware context fromt a stream of bytes
373 * This method is designed for HSAIL execution
374 */
375 void setContext(const void *in);
376
377 TheGpuISA::GPUISA&
378 gpuISA()
379 {
380 return _gpuISA;
381 }
382
375 private:
383 private:
384 TheGpuISA::GPUISA _gpuISA;
376 /**
377 * Stack containing Control Flow Graph nodes (i.e., kernel instructions)
378 * to be visited by the wavefront, and the associated execution masks. The
379 * reconvergence stack grows every time the wavefront reaches a divergence
380 * point (branch instruction), and shrinks every time the wavefront
381 * reaches a reconvergence point (immediate post-dominator instruction).
382 */
383 std::deque<std::unique_ptr<ReconvergenceStackEntry>> reconvergenceStack;
384};
385
386#endif // __WAVEFRONT_HH__
385 /**
386 * Stack containing Control Flow Graph nodes (i.e., kernel instructions)
387 * to be visited by the wavefront, and the associated execution masks. The
388 * reconvergence stack grows every time the wavefront reaches a divergence
389 * point (branch instruction), and shrinks every time the wavefront
390 * reaches a reconvergence point (immediate post-dominator instruction).
391 */
392 std::deque<std::unique_ptr<ReconvergenceStackEntry>> reconvergenceStack;
393};
394
395#endif // __WAVEFRONT_HH__