wavefront.cc (11695:0a65922d564d) wavefront.cc (11696:80c30bd0c7d6)
1/*
2 * Copyright (c) 2011-2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * For use for simulation and test purposes only
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:

--- 35 unchanged lines hidden (view full) ---

44
45Wavefront*
46WavefrontParams::create()
47{
48 return new Wavefront(this);
49}
50
51Wavefront::Wavefront(const Params *p)
1/*
2 * Copyright (c) 2011-2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * For use for simulation and test purposes only
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:

--- 35 unchanged lines hidden (view full) ---

44
45Wavefront*
46WavefrontParams::create()
47{
48 return new Wavefront(this);
49}
50
51Wavefront::Wavefront(const Params *p)
52 : SimObject(p), callArgMem(nullptr)
52 : SimObject(p), callArgMem(nullptr), _gpuISA(*this)
53{
54 lastTrace = 0;
55 simdId = p->simdId;
56 wfSlotId = p->wf_slot_id;
57 status = S_STOPPED;
58 reservedVectorRegs = 0;
59 startVgprIndex = 0;
60 outstandingReqs = 0;

--- 604 unchanged lines hidden (view full) ---

665 computeUnit->vrf[simdId]->exec(ii, this);
666 srcRegOpDist.sample(ii->numSrcRegOperands());
667 dstRegOpDist.sample(ii->numDstRegOperands());
668 computeUnit->numInstrExecuted++;
669 computeUnit->execRateDist.sample(computeUnit->totalCycles.value() -
670 computeUnit->lastExecCycle[simdId]);
671 computeUnit->lastExecCycle[simdId] = computeUnit->totalCycles.value();
672 if (pc() == old_pc) {
53{
54 lastTrace = 0;
55 simdId = p->simdId;
56 wfSlotId = p->wf_slot_id;
57 status = S_STOPPED;
58 reservedVectorRegs = 0;
59 startVgprIndex = 0;
60 outstandingReqs = 0;

--- 604 unchanged lines hidden (view full) ---

665 computeUnit->vrf[simdId]->exec(ii, this);
666 srcRegOpDist.sample(ii->numSrcRegOperands());
667 dstRegOpDist.sample(ii->numDstRegOperands());
668 computeUnit->numInstrExecuted++;
669 computeUnit->execRateDist.sample(computeUnit->totalCycles.value() -
670 computeUnit->lastExecCycle[simdId]);
671 computeUnit->lastExecCycle[simdId] = computeUnit->totalCycles.value();
672 if (pc() == old_pc) {
673 uint32_t new_pc = old_pc + 1;
673 uint32_t new_pc = _gpuISA.advancePC(old_pc, ii);
674 // PC not modified by instruction, proceed to next or pop frame
675 pc(new_pc);
676 if (new_pc == rpc()) {
677 popFromReconvergenceStack();
678 discardFetch();
679 } else {
680 instructionBuffer.pop_front();
681 }

--- 309 unchanged lines hidden ---
674 // PC not modified by instruction, proceed to next or pop frame
675 pc(new_pc);
676 if (new_pc == rpc()) {
677 popFromReconvergenceStack();
678 discardFetch();
679 } else {
680 instructionBuffer.pop_front();
681 }

--- 309 unchanged lines hidden ---