1/*
2 * Copyright (c) 2011-2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * For use for simulation and test purposes only
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:

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651 // Get current instruction
652
653 GPUDynInstPtr ii = instructionBuffer.front();
654
655 const uint32_t old_pc = pc();
656 DPRINTF(GPUExec, "CU%d: WF[%d][%d]: wave[%d] Executing inst: %s "
657 "(pc: %i)\n", computeUnit->cu_id, simdId, wfSlotId, wfDynId,
658 ii->disassemble(), old_pc);
659 ii->execute(ii);
660 // access the VRF
661 computeUnit->vrf[simdId]->exec(ii, this);
662 srcRegOpDist.sample(ii->numSrcRegOperands());
663 dstRegOpDist.sample(ii->numDstRegOperands());
664 computeUnit->numInstrExecuted++;
665 computeUnit->execRateDist.sample(computeUnit->totalCycles.value() -
666 computeUnit->lastExecCycle[simdId]);
667 computeUnit->lastExecCycle[simdId] = computeUnit->totalCycles.value();

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