schedule_stage.cc (11308:7d8836fd043d) | schedule_stage.cc (12696:15d4edfbb01b) |
---|---|
1/* 2 * Copyright (c) 2014-2015 Advanced Micro Devices, Inc. 3 * All rights reserved. 4 * 5 * For use for simulation and test purposes only 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: --- 31 unchanged lines hidden (view full) --- 40#include "gpu-compute/vector_register_file.hh" 41#include "gpu-compute/wavefront.hh" 42 43ScheduleStage::ScheduleStage(const ComputeUnitParams *p) 44 : numSIMDs(p->num_SIMDs), 45 numMemUnits(p->num_global_mem_pipes + p->num_shared_mem_pipes) 46{ 47 for (int j = 0; j < numSIMDs + numMemUnits; ++j) { | 1/* 2 * Copyright (c) 2014-2015 Advanced Micro Devices, Inc. 3 * All rights reserved. 4 * 5 * For use for simulation and test purposes only 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: --- 31 unchanged lines hidden (view full) --- 40#include "gpu-compute/vector_register_file.hh" 41#include "gpu-compute/wavefront.hh" 42 43ScheduleStage::ScheduleStage(const ComputeUnitParams *p) 44 : numSIMDs(p->num_SIMDs), 45 numMemUnits(p->num_global_mem_pipes + p->num_shared_mem_pipes) 46{ 47 for (int j = 0; j < numSIMDs + numMemUnits; ++j) { |
48 Scheduler newScheduler(p); 49 scheduler.push_back(newScheduler); | 48 scheduler.emplace_back(p); |
50 } 51} 52 53ScheduleStage::~ScheduleStage() 54{ 55 scheduler.clear(); 56 waveStatusList.clear(); 57} --- 94 unchanged lines hidden --- | 49 } 50} 51 52ScheduleStage::~ScheduleStage() 53{ 54 scheduler.clear(); 55 waveStatusList.clear(); 56} --- 94 unchanged lines hidden --- |