gpu_tlb.cc (13449:2f7efa89c58b) gpu_tlb.cc (13557:fc33e6048b25)
1/*
2 * Copyright (c) 2011-2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * For use for simulation and test purposes only
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:

--- 603 unchanged lines hidden (view full) ---

612 regNum = MISCREG_VM_HSAVE_PA;
613 break;
614 default:
615 return std::make_shared<GeneralProtection>(0);
616 }
617 //The index is multiplied by the size of a MiscReg so that
618 //any memory dependence calculations will not see these as
619 //overlapping.
1/*
2 * Copyright (c) 2011-2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * For use for simulation and test purposes only
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:

--- 603 unchanged lines hidden (view full) ---

612 regNum = MISCREG_VM_HSAVE_PA;
613 break;
614 default:
615 return std::make_shared<GeneralProtection>(0);
616 }
617 //The index is multiplied by the size of a MiscReg so that
618 //any memory dependence calculations will not see these as
619 //overlapping.
620 req->setPaddr(regNum * sizeof(MiscReg));
620 req->setPaddr(regNum * sizeof(RegVal));
621 return NoFault;
622 } else if (prefix == IntAddrPrefixIO) {
623 // TODO If CPL > IOPL or in virtual mode, check the I/O permission
624 // bitmap in the TSS.
625
626 Addr IOPort = vaddr & ~IntAddrPrefixMask;
627 // Make sure the address fits in the expected 16 bit IO address
628 // space.
629 assert(!(IOPort & ~0xFFFF));
630
631 if (IOPort == 0xCF8 && req->getSize() == 4) {
632 req->setFlags(Request::MMAPPED_IPR);
621 return NoFault;
622 } else if (prefix == IntAddrPrefixIO) {
623 // TODO If CPL > IOPL or in virtual mode, check the I/O permission
624 // bitmap in the TSS.
625
626 Addr IOPort = vaddr & ~IntAddrPrefixMask;
627 // Make sure the address fits in the expected 16 bit IO address
628 // space.
629 assert(!(IOPort & ~0xFFFF));
630
631 if (IOPort == 0xCF8 && req->getSize() == 4) {
632 req->setFlags(Request::MMAPPED_IPR);
633 req->setPaddr(MISCREG_PCI_CONFIG_ADDRESS * sizeof(MiscReg));
633 req->setPaddr(MISCREG_PCI_CONFIG_ADDRESS * sizeof(RegVal));
634 } else if ((IOPort & ~mask(2)) == 0xCFC) {
635 req->setFlags(Request::UNCACHEABLE);
636
637 Addr configAddress =
638 tc->readMiscRegNoEffect(MISCREG_PCI_CONFIG_ADDRESS);
639
640 if (bits(configAddress, 31, 31)) {
641 req->setPaddr(PhysAddrPrefixPciConfig |

--- 1172 unchanged lines hidden --- 		634 } else if ((IOPort & ~mask(2)) == 0xCFC) {
635 req->setFlags(Request::UNCACHEABLE);
636
637 Addr configAddress =
638 tc->readMiscRegNoEffect(MISCREG_PCI_CONFIG_ADDRESS);
639
640 if (bits(configAddress, 31, 31)) {
641 req->setPaddr(PhysAddrPrefixPciConfig |

--- 1172 unchanged lines hidden ---