gpu_tlb.cc (12461:a4cb506cda74) | gpu_tlb.cc (12663:565c16ffe1d1) |
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1/* 2 * Copyright (c) 2011-2015 Advanced Micro Devices, Inc. 3 * All rights reserved. 4 * 5 * For use for simulation and test purposes only 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: --- 1530 unchanged lines hidden (view full) --- 1539 if (!pte && sender_state->tlbMode != BaseTLB::Execute && 1540 p->fixupStackFault(vaddr)) { 1541 pte = p->pTable->lookup(vaddr); 1542 } 1543 1544 if (!sender_state->prefetch) { 1545 // no PageFaults are permitted after 1546 // the second page table lookup | 1/* 2 * Copyright (c) 2011-2015 Advanced Micro Devices, Inc. 3 * All rights reserved. 4 * 5 * For use for simulation and test purposes only 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: --- 1530 unchanged lines hidden (view full) --- 1539 if (!pte && sender_state->tlbMode != BaseTLB::Execute && 1540 p->fixupStackFault(vaddr)) { 1541 pte = p->pTable->lookup(vaddr); 1542 } 1543 1544 if (!sender_state->prefetch) { 1545 // no PageFaults are permitted after 1546 // the second page table lookup |
1547 assert(success); | 1547 assert(pte); |
1548 1549 DPRINTF(GPUTLB, "Mapping %#x to %#x\n", alignedVaddr, 1550 pte->paddr); 1551 1552 sender_state->tlbEntry = 1553 new GpuTlbEntry(0, virt_page_addr, | 1548 1549 DPRINTF(GPUTLB, "Mapping %#x to %#x\n", alignedVaddr, 1550 pte->paddr); 1551 1552 sender_state->tlbEntry = 1553 new GpuTlbEntry(0, virt_page_addr, |
1554 pte->paddr, success); | 1554 pte->paddr, true); |
1555 } else { 1556 // If this was a prefetch, then do the normal thing if it 1557 // was a successful translation. Otherwise, send an empty 1558 // TLB entry back so that it can be figured out as empty and 1559 // handled accordingly. 1560 if (pte) { 1561 DPRINTF(GPUTLB, "Mapping %#x to %#x\n", alignedVaddr, 1562 pte->paddr); 1563 1564 sender_state->tlbEntry = 1565 new GpuTlbEntry(0, virt_page_addr, | 1555 } else { 1556 // If this was a prefetch, then do the normal thing if it 1557 // was a successful translation. Otherwise, send an empty 1558 // TLB entry back so that it can be figured out as empty and 1559 // handled accordingly. 1560 if (pte) { 1561 DPRINTF(GPUTLB, "Mapping %#x to %#x\n", alignedVaddr, 1562 pte->paddr); 1563 1564 sender_state->tlbEntry = 1565 new GpuTlbEntry(0, virt_page_addr, |
1566 pte->paddr, success); | 1566 pte->paddr, true); |
1567 } else { 1568 DPRINTF(GPUPrefetch, "Prefetch failed %#x\n", 1569 alignedVaddr); 1570 1571 sender_state->tlbEntry = new GpuTlbEntry(); 1572 1573 return; 1574 } --- 229 unchanged lines hidden --- | 1567 } else { 1568 DPRINTF(GPUPrefetch, "Prefetch failed %#x\n", 1569 alignedVaddr); 1570 1571 sender_state->tlbEntry = new GpuTlbEntry(); 1572 1573 return; 1574 } --- 229 unchanged lines hidden --- |