compute_unit.hh (11692:e772fdcd3809) compute_unit.hh (11695:0a65922d564d)
1/*
2 * Copyright (c) 2011-2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * For use for simulation and test purposes only
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:

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296 bool isSimdDone(uint32_t) const;
297
298 protected:
299 MasterID _masterId;
300
301 LdsState &lds;
302
303 public:
1/*
2 * Copyright (c) 2011-2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * For use for simulation and test purposes only
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:

--- 287 unchanged lines hidden (view full) ---

296 bool isSimdDone(uint32_t) const;
297
298 protected:
299 MasterID _masterId;
300
301 LdsState &lds;
302
303 public:
304 Stats::Scalar vALUInsts;
305 Stats::Formula vALUInstsPerWF;
306 Stats::Scalar sALUInsts;
307 Stats::Formula sALUInstsPerWF;
308 Stats::Scalar instCyclesVALU;
309 Stats::Scalar instCyclesSALU;
310 Stats::Scalar threadCyclesVALU;
311 Stats::Formula vALUUtilization;
312 Stats::Scalar ldsNoFlatInsts;
313 Stats::Formula ldsNoFlatInstsPerWF;
314 Stats::Scalar flatVMemInsts;
315 Stats::Formula flatVMemInstsPerWF;
316 Stats::Scalar flatLDSInsts;
317 Stats::Formula flatLDSInstsPerWF;
318 Stats::Scalar vectorMemWrites;
319 Stats::Formula vectorMemWritesPerWF;
320 Stats::Scalar vectorMemReads;
321 Stats::Formula vectorMemReadsPerWF;
322 Stats::Scalar scalarMemWrites;
323 Stats::Formula scalarMemWritesPerWF;
324 Stats::Scalar scalarMemReads;
325 Stats::Formula scalarMemReadsPerWF;
326
327 void updateInstStats(GPUDynInstPtr gpuDynInst);
328
304 // the following stats compute the avg. TLB accesslatency per
305 // uncoalesced request (only for data)
306 Stats::Scalar tlbRequests;
307 Stats::Scalar tlbCycles;
308 Stats::Formula tlbLatency;
309 // hitsPerTLBLevel[x] are the hits in Level x TLB. x = 0 is the page table.
310 Stats::Vector hitsPerTLBLevel;
311

--- 439 unchanged lines hidden --- 		329 // the following stats compute the avg. TLB accesslatency per
330 // uncoalesced request (only for data)
331 Stats::Scalar tlbRequests;
332 Stats::Scalar tlbCycles;
333 Stats::Formula tlbLatency;
334 // hitsPerTLBLevel[x] are the hits in Level x TLB. x = 0 is the page table.
335 Stats::Vector hitsPerTLBLevel;
336

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