1/* 2 * Copyright (c) 2011-2015 Advanced Micro Devices, Inc. 3 * All rights reserved. 4 * 5 * For use for simulation and test purposes only 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: --- 44 unchanged lines hidden (view full) --- 53#include "gpu-compute/ndrange.hh" 54#include "gpu-compute/shader.hh" 55#include "gpu-compute/simple_pool_manager.hh" 56#include "gpu-compute/vector_register_file.hh" 57#include "gpu-compute/wavefront.hh" 58#include "mem/page_table.hh" 59#include "sim/process.hh" 60 |
61ComputeUnit::ComputeUnit(const Params *p) : ClockedObject(p), fetchStage(p), |
62 scoreboardCheckStage(p), scheduleStage(p), execStage(p), 63 globalMemoryPipe(p), localMemoryPipe(p), rrNextMemID(0), rrNextALUWp(0), 64 cu_id(p->cu_id), vrf(p->vector_register_file), numSIMDs(p->num_SIMDs), 65 spBypassPipeLength(p->spbypass_pipe_length), 66 dpBypassPipeLength(p->dpbypass_pipe_length), 67 issuePeriod(p->issue_period), 68 numGlbMemUnits(p->num_global_mem_pipes), 69 numLocMemUnits(p->num_shared_mem_pipes), --- 1322 unchanged lines hidden (view full) --- 1392 retries.pop_front(); 1393 } 1394 } 1395} 1396 1397void 1398ComputeUnit::regStats() 1399{ |
1400 ClockedObject::regStats(); |
1401 1402 vALUInsts 1403 .name(name() + ".valu_insts") 1404 .desc("Number of vector ALU insts issued.") 1405 ; 1406 vALUInstsPerWF 1407 .name(name() + ".valu_insts_per_wf") 1408 .desc("The avg. number of vector ALU insts issued per-wavefront.") --- 502 unchanged lines hidden --- |