GPU.py (11534:7106f550afad) | GPU.py (11692:e772fdcd3809) |
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1# 2# Copyright (c) 2015 Advanced Micro Devices, Inc. 3# All rights reserved. 4# 5# For use for simulation and test purposes only 6# 7# Redistribution and use in source and binary forms, with or without 8# modification, are permitted provided that the following conditions are met: --- 157 unchanged lines hidden (view full) --- 166 pio_addr = Param.Addr(0x200000000, "Device Address") 167 pio_latency = Param.Latency('1ns', "Programmed IO latency") 168 shader_pointer = Param.Shader('pointer to shader') 169 translation_port = MasterPort('Port to the dispatcher TLB') 170 cpu = Param.BaseCPU("CPU to wake up on kernel completion") 171 172 cl_driver = Param.ClDriver('pointer to driver') 173 | 1# 2# Copyright (c) 2015 Advanced Micro Devices, Inc. 3# All rights reserved. 4# 5# For use for simulation and test purposes only 6# 7# Redistribution and use in source and binary forms, with or without 8# modification, are permitted provided that the following conditions are met: --- 157 unchanged lines hidden (view full) --- 166 pio_addr = Param.Addr(0x200000000, "Device Address") 167 pio_latency = Param.Latency('1ns', "Programmed IO latency") 168 shader_pointer = Param.Shader('pointer to shader') 169 translation_port = MasterPort('Port to the dispatcher TLB') 170 cpu = Param.BaseCPU("CPU to wake up on kernel completion") 171 172 cl_driver = Param.ClDriver('pointer to driver') 173 |
174class OpType(Enum): vals = [ 175 'OT_NULL', 176 'OT_ALU', 177 'OT_SPECIAL', 178 'OT_GLOBAL_READ', 179 'OT_GLOBAL_WRITE', 180 'OT_GLOBAL_ATOMIC', 181 'OT_GLOBAL_HIST', 182 'OT_GLOBAL_LDAS', 183 'OT_SHARED_READ', 184 'OT_SHARED_WRITE', 185 'OT_SHARED_ATOMIC', 186 'OT_SHARED_HIST', 187 'OT_SHARED_LDAS', 188 'OT_PRIVATE_READ', 189 'OT_PRIVATE_WRITE', 190 'OT_PRIVATE_ATOMIC', 191 'OT_PRIVATE_HIST', 192 'OT_PRIVATE_LDAS', 193 'OT_SPILL_READ', 194 'OT_SPILL_WRITE', 195 'OT_SPILL_ATOMIC', 196 'OT_SPILL_HIST', 197 'OT_SPILL_LDAS', 198 'OT_READONLY_READ', 199 'OT_READONLY_WRITE', 200 'OT_READONLY_ATOMIC', 201 'OT_READONLY_HIST', 202 'OT_READONLY_LDAS', 203 'OT_FLAT_READ', 204 'OT_FLAT_WRITE', 205 'OT_FLAT_ATOMIC', 206 'OT_FLAT_HIST', 207 'OT_FLAT_LDAS', 208 'OT_KERN_READ', 209 'OT_BRANCH', 210 211 # note: Only the OT_BOTH_MEMFENCE seems to be supported in the 1.0F version 212 # of the compiler. 213 'OT_SHARED_MEMFENCE', 214 'OT_GLOBAL_MEMFENCE', 215 'OT_BOTH_MEMFENCE', 216 217 'OT_BARRIER', 218 'OT_PRINT', 219 'OT_RET', 220 'OT_NOP', 221 'OT_ARG' 222 ] 223 | |
224class MemType(Enum): vals = [ 225 'M_U8', 226 'M_U16', 227 'M_U32', 228 'M_U64', 229 'M_S8', 230 'M_S16', 231 'M_S32', 232 'M_S64', 233 'M_F16', 234 'M_F32', 235 'M_F64', 236 ] 237 | 174class MemType(Enum): vals = [ 175 'M_U8', 176 'M_U16', 177 'M_U32', 178 'M_U64', 179 'M_S8', 180 'M_S16', 181 'M_S32', 182 'M_S64', 183 'M_F16', 184 'M_F32', 185 'M_F64', 186 ] 187 |
238class MemOpType(Enum): vals = [ 239 'MO_LD', 240 'MO_ST', 241 'MO_LDAS', 242 'MO_LDA', 243 'MO_AAND', 244 'MO_AOR', 245 'MO_AXOR', 246 'MO_ACAS', 247 'MO_AEXCH', 248 'MO_AADD', 249 'MO_ASUB', 250 'MO_AINC', 251 'MO_ADEC', 252 'MO_AMAX', 253 'MO_AMIN', 254 'MO_ANRAND', 255 'MO_ANROR', 256 'MO_ANRXOR', 257 'MO_ANRCAS', 258 'MO_ANREXCH', 259 'MO_ANRADD', 260 'MO_ANRSUB', 261 'MO_ANRINC', 262 'MO_ANRDEC', 263 'MO_ANRMAX', 264 'MO_ANRMIN', 265 'MO_HAND', 266 'MO_HOR', 267 'MO_HXOR', 268 'MO_HCAS', 269 'MO_HEXCH', 270 'MO_HADD', 271 'MO_HSUB', 272 'MO_HINC', 273 'MO_HDEC', 274 'MO_HMAX', 275 'MO_HMIN', 276 'MO_UNDEF' 277 ] 278 | |
279class StorageClassType(Enum): vals = [ 280 'SC_SPILL', 281 'SC_GLOBAL', 282 'SC_SHARED', 283 'SC_PRIVATE', 284 'SC_READONLY', 285 'SC_KERNARG', 286 'SC_NONE', 287 ] 288 289class RegisterType(Enum): vals = [ 290 'RT_VECTOR', 291 'RT_SCALAR', 292 'RT_CONDITION', 293 'RT_HARDWARE', 294 'RT_NONE', 295 ] | 188class StorageClassType(Enum): vals = [ 189 'SC_SPILL', 190 'SC_GLOBAL', 191 'SC_SHARED', 192 'SC_PRIVATE', 193 'SC_READONLY', 194 'SC_KERNARG', 195 'SC_NONE', 196 ] 197 198class RegisterType(Enum): vals = [ 199 'RT_VECTOR', 200 'RT_SCALAR', 201 'RT_CONDITION', 202 'RT_HARDWARE', 203 'RT_NONE', 204 ] |
296 297class GenericMemoryOrder(Enum): vals = [ 298 'MEMORY_ORDER_NONE', 299 'MEMORY_ORDER_RELAXED', 300 'MEMORY_ORDER_SC_ACQUIRE', 301 'MEMORY_ORDER_SC_RELEASE', 302 'MEMORY_ORDER_SC_ACQUIRE_RELEASE', 303 ] 304 305class GenericMemoryScope(Enum): vals = [ 306 'MEMORY_SCOPE_NONE', 307 'MEMORY_SCOPE_WORKITEM', 308 'MEMORY_SCOPE_WAVEFRONT', 309 'MEMORY_SCOPE_WORKGROUP', 310 'MEMORY_SCOPE_DEVICE', 311 'MEMORY_SCOPE_SYSTEM', 312 ] | |