pc.cc (5389:215d8a8c97df) | pc.cc (5446:23711deb13ac) |
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1/* | 1/* |
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan | 2 * Copyright (c) 2008 The Regents of The University of Michigan |
3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the --- 21 unchanged lines hidden (view full) --- 32 * Implementation of PC platform. 33 */ 34 35#include <deque> 36#include <string> 37#include <vector> 38 39#include "arch/x86/x86_traits.hh" | 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the --- 21 unchanged lines hidden (view full) --- 32 * Implementation of PC platform. 33 */ 34 35#include <deque> 36#include <string> 37#include <vector> 38 39#include "arch/x86/x86_traits.hh" |
40#include "dev/intel_8254_timer.hh" |
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40#include "cpu/intr_control.hh" 41#include "dev/simconsole.hh" 42#include "dev/x86/pc.hh" 43#include "sim/system.hh" 44 45using namespace std; 46using namespace TheISA; 47 48PC::PC(const Params *p) 49 : Platform(p), system(p->system) 50{ | 41#include "cpu/intr_control.hh" 42#include "dev/simconsole.hh" 43#include "dev/x86/pc.hh" 44#include "sim/system.hh" 45 46using namespace std; 47using namespace TheISA; 48 49PC::PC(const Params *p) 50 : Platform(p), system(p->system) 51{ |
52 southBridge = NULL; |
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51 // set the back pointer from the system to myself 52 system->platform = this; 53} 54 | 53 // set the back pointer from the system to myself 54 system->platform = this; 55} 56 |
57void 58PC::init() 59{ 60 assert(southBridge); 61 Intel8254Timer & timer = southBridge->pit.pit; 62 //Timer 0, mode 2, no bcd, 16 bit count 63 timer.writeControl(0x34); 64 //Timer 0, latch command 65 timer.writeControl(0x00); 66 //Write a 16 bit count of 0 67 timer.counter0.write(0); 68 timer.counter0.write(0); 69} 70 |
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55Tick 56PC::intrFrequency() 57{ 58 panic("Need implementation\n"); 59 M5_DUMMY_RETURN 60} 61 62void --- 47 unchanged lines hidden --- | 71Tick 72PC::intrFrequency() 73{ 74 panic("Need implementation\n"); 75 M5_DUMMY_RETURN 76} 77 78void --- 47 unchanged lines hidden --- |