intdev.hh (9557:8666e81607a6) intdev.hh (9807:63d7362bbdf2)
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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55#include "params/X86IntSinkPin.hh"
56#include "params/X86IntSourcePin.hh"
57#include "sim/sim_object.hh"
58
59namespace X86ISA {
60
61typedef std::list<int> ApicList;
62
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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55#include "params/X86IntSinkPin.hh"
56#include "params/X86IntSourcePin.hh"
57#include "sim/sim_object.hh"
58
59namespace X86ISA {
60
61typedef std::list<int> ApicList;
62
63class IntDev
63class IntDevice
64{
65 protected:
66 class IntSlavePort : public MessageSlavePort
67 {
64{
65 protected:
66 class IntSlavePort : public MessageSlavePort
67 {
68 IntDev * device;
68 IntDevice * device;
69
70 public:
71 IntSlavePort(const std::string& _name, MemObject* _parent,
69
70 public:
71 IntSlavePort(const std::string& _name, MemObject* _parent,
72 IntDev* dev) :
72 IntDevice* dev) :
73 MessageSlavePort(_name, _parent), device(dev)
74 {
75 }
76
77 AddrRangeList getAddrRanges() const
78 {
79 return device->getIntAddrRange();
80 }
81
82 Tick recvMessage(PacketPtr pkt)
83 {
84 // @todo someone should pay for this
85 pkt->busFirstWordDelay = pkt->busLastWordDelay = 0;
86 return device->recvMessage(pkt);
87 }
88 };
89
90 class IntMasterPort : public MessageMasterPort
91 {
73 MessageSlavePort(_name, _parent), device(dev)
74 {
75 }
76
77 AddrRangeList getAddrRanges() const
78 {
79 return device->getIntAddrRange();
80 }
81
82 Tick recvMessage(PacketPtr pkt)
83 {
84 // @todo someone should pay for this
85 pkt->busFirstWordDelay = pkt->busLastWordDelay = 0;
86 return device->recvMessage(pkt);
87 }
88 };
89
90 class IntMasterPort : public MessageMasterPort
91 {
92 IntDev* device;
92 IntDevice* device;
93 Tick latency;
94 public:
95 IntMasterPort(const std::string& _name, MemObject* _parent,
93 Tick latency;
94 public:
95 IntMasterPort(const std::string& _name, MemObject* _parent,
96 IntDev* dev, Tick _latency) :
96 IntDevice* dev, Tick _latency) :
97 MessageMasterPort(_name, _parent), device(dev), latency(_latency)
98 {
99 }
100
101 Tick recvResponse(PacketPtr pkt)
102 {
103 return device->recvResponse(pkt);
104 }
105
106 // This is x86 focused, so if this class becomes generic, this would
107 // need to be moved into a subclass.
108 void sendMessage(ApicList apics,
109 TriggerIntMessage message, bool timing);
110 };
111
112 IntMasterPort intMasterPort;
113
114 public:
97 MessageMasterPort(_name, _parent), device(dev), latency(_latency)
98 {
99 }
100
101 Tick recvResponse(PacketPtr pkt)
102 {
103 return device->recvResponse(pkt);
104 }
105
106 // This is x86 focused, so if this class becomes generic, this would
107 // need to be moved into a subclass.
108 void sendMessage(ApicList apics,
109 TriggerIntMessage message, bool timing);
110 };
111
112 IntMasterPort intMasterPort;
113
114 public:
115 IntDev(MemObject * parent, Tick latency = 0) :
115 IntDevice(MemObject * parent, Tick latency = 0) :
116 intMasterPort(parent->name() + ".int_master", parent, this, latency)
117 {
118 }
119
116 intMasterPort(parent->name() + ".int_master", parent, this, latency)
117 {
118 }
119
120 virtual ~IntDev()
120 virtual ~IntDevice()
121 {}
122
123 virtual void init();
124
125 virtual void
126 signalInterrupt(int line)
127 {
128 panic("signalInterrupt not implemented.\n");

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158 {
159 panic("intAddrRange not implemented.\n");
160 }
161};
162
163class IntSinkPin : public SimObject
164{
165 public:
121 {}
122
123 virtual void init();
124
125 virtual void
126 signalInterrupt(int line)
127 {
128 panic("signalInterrupt not implemented.\n");

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158 {
159 panic("intAddrRange not implemented.\n");
160 }
161};
162
163class IntSinkPin : public SimObject
164{
165 public:
166 IntDev * device;
166 IntDevice * device;
167 int number;
168
169 typedef X86IntSinkPinParams Params;
170
171 const Params *
172 params() const
173 {
174 return dynamic_cast<const Params *>(_params);
175 }
176
177 IntSinkPin(Params *p) : SimObject(p),
167 int number;
168
169 typedef X86IntSinkPinParams Params;
170
171 const Params *
172 params() const
173 {
174 return dynamic_cast<const Params *>(_params);
175 }
176
177 IntSinkPin(Params *p) : SimObject(p),
178 device(dynamic_cast(p->device)), number(p->number)
178 device(dynamic_cast<IntDevice *>(p->device)), number(p->number)
179 {
180 assert(device);
181 }
182};
183
184class IntSourcePin : public SimObject
185{
186 protected:

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180 assert(device);
181 }
182};
183
184class IntSourcePin : public SimObject
185{
186 protected:

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