1/* 2 * Copyright (c) 2008 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 */ 30 31#ifndef __DEV_X86_INTDEV_HH__ 32#define __DEV_X86_INTDEV_HH__ 33 34#include <assert.h> 35#include <string> 36 37#include "arch/x86/x86_traits.hh" 38#include "arch/x86/intmessage.hh" 39#include "mem/mem_object.hh" 40#include "mem/mport.hh" 41#include "sim/sim_object.hh" 42#include "params/X86IntSourcePin.hh" 43#include "params/X86IntSinkPin.hh" 44#include "params/X86IntLine.hh" 45 46namespace X86ISA { 47 48class IntDev 49{ 50 protected: 51 class IntPort : public MessagePort 52 { 53 IntDev * device; 54 Tick latency; 55 Addr intAddr; 56 public: 57 IntPort(const std::string &_name, MemObject * _parent, 58 IntDev *dev, Tick _latency) : 59 MessagePort(_name, _parent), device(dev), latency(_latency) 60 { 61 } 62 63 void getDeviceAddressRanges(AddrRangeList &resp, bool &snoop) 64 { 65 snoop = false; 66 device->getIntAddrRange(resp); 67 } 68 69 Tick recvMessage(PacketPtr pkt) 70 { 71 return device->recvMessage(pkt); 72 } 73
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79 // This is x86 focused, so if this class becomes generic, this would 80 // need to be moved into a subclass. 81 void sendMessage(TriggerIntMessage message, bool timing); 82 83 void recvStatusChange(Status status) 84 { 85 if (status == RangeChange) { 86 sendStatusChange(Port::RangeChange); 87 } 88 } 89 90 }; 91 92 IntPort * intPort; 93 94 public: 95 IntDev(MemObject * parent, Tick latency = 0) 96 { 97 if (parent != NULL) { 98 intPort = new IntPort(parent->name() + ".int_port", 99 parent, this, latency); 100 } else { 101 intPort = NULL; 102 } 103 } 104 105 virtual ~IntDev() 106 {} 107 108 virtual void 109 signalInterrupt(int line) 110 { 111 panic("signalInterrupt not implemented.\n"); 112 } 113 114 virtual void 115 raiseInterruptPin(int number) 116 { 117 panic("raiseInterruptPin not implemented.\n"); 118 } 119 120 virtual void 121 lowerInterruptPin(int number) 122 { 123 panic("lowerInterruptPin not implemented.\n"); 124 } 125 126 virtual Tick 127 recvMessage(PacketPtr pkt) 128 { 129 panic("recvMessage not implemented.\n"); 130 return 0; 131 } 132
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