1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2008 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright

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38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Gabe Black
41 */
42
43#include "dev/x86/intdev.hh"
44
45void
34X86ISA::IntDev::IntPort::sendMessage(ApicList apics,
35 TriggerIntMessage message, bool timing)
46X86ISA::IntDev::IntPort::sendMessage(ApicList apics, TriggerIntMessage message,
47 bool timing)
48{
49 ApicList::iterator apicIt;
50 for (apicIt = apics.begin(); apicIt != apics.end(); apicIt++) {
51 PacketPtr pkt = buildIntRequest(*apicIt, message);
52 if (timing) {
41 sendMessageTiming(pkt, latency);
53 schedSendTiming(pkt, curTick() + latency);
54 // The target handles cleaning up the packet in timing mode.
55 } else {
44 sendMessageAtomic(pkt);
56 // ignore the latency involved in the atomic transaction
57 sendAtomic(pkt);
58 assert(pkt->isResponse());
59 // also ignore the latency in handling the response
60 recvResponse(pkt);
61 delete pkt->req;
62 delete pkt;
63 }
64 }
65}
66
67void
68X86ISA::IntDev::init()

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