i8259.hh (5654:340254de2031) i8259.hh (5656:f548d22a2f71)
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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48
49 // Interrupt Request Register
50 uint8_t IRR;
51 // In Service Register
52 uint8_t ISR;
53 // Interrupt Mask Register
54 uint8_t IMR;
55
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 39 unchanged lines hidden (view full) ---

48
49 // Interrupt Request Register
50 uint8_t IRR;
51 // In Service Register
52 uint8_t ISR;
53 // Interrupt Mask Register
54 uint8_t IMR;
55
56 // The higher order bits of the vector to return
57 uint8_t vectorOffset;
58
56 bool cascadeMode;
57 // A bit vector of lines with slaves attached, or the slave id, depending
58 // on if this is a master or slave PIC.
59 uint8_t cascadeBits;
60
61 bool edgeTriggered;
62 bool readIRR;
63

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72 params() const
73 {
74 return dynamic_cast<const Params *>(_params);
75 }
76
77 I8259(Params * p) : BasicPioDevice(p), IntDev(this),
78 latency(p->pio_latency), output(p->output),
79 mode(p->mode), IRR(0), ISR(0), IMR(0),
59 bool cascadeMode;
60 // A bit vector of lines with slaves attached, or the slave id, depending
61 // on if this is a master or slave PIC.
62 uint8_t cascadeBits;
63
64 bool edgeTriggered;
65 bool readIRR;
66

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75 params() const
76 {
77 return dynamic_cast<const Params *>(_params);
78 }
79
80 I8259(Params * p) : BasicPioDevice(p), IntDev(this),
81 latency(p->pio_latency), output(p->output),
82 mode(p->mode), IRR(0), ISR(0), IMR(0),
80 readIRR(true), initControlWord(0)
83 vectorOffset(0), readIRR(true), initControlWord(0)
81 {
82 pioSize = 2;
83 }
84
85 Tick read(PacketPtr pkt);
86
87 Tick write(PacketPtr pkt);
88
89 void signalInterrupt(int line);
90};
91
92}; // namespace X86ISA
93
94#endif //__DEV_X86_I8259_HH__
84 {
85 pioSize = 2;
86 }
87
88 Tick read(PacketPtr pkt);
89
90 Tick write(PacketPtr pkt);
91
92 void signalInterrupt(int line);
93};
94
95}; // namespace X86ISA
96
97#endif //__DEV_X86_I8259_HH__