1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 39 unchanged lines hidden (view full) --- 48 49 // Interrupt Request Register 50 uint8_t IRR; 51 // In Service Register 52 uint8_t ISR; 53 // Interrupt Mask Register 54 uint8_t IMR; 55 |
56 // The higher order bits of the vector to return 57 uint8_t vectorOffset; 58 |
59 bool cascadeMode; 60 // A bit vector of lines with slaves attached, or the slave id, depending 61 // on if this is a master or slave PIC. 62 uint8_t cascadeBits; 63 64 bool edgeTriggered; 65 bool readIRR; 66 --- 8 unchanged lines hidden (view full) --- 75 params() const 76 { 77 return dynamic_cast<const Params *>(_params); 78 } 79 80 I8259(Params * p) : BasicPioDevice(p), IntDev(this), 81 latency(p->pio_latency), output(p->output), 82 mode(p->mode), IRR(0), ISR(0), IMR(0), |
83 vectorOffset(0), readIRR(true), initControlWord(0) |
84 { 85 pioSize = 2; 86 } 87 88 Tick read(PacketPtr pkt); 89 90 Tick write(PacketPtr pkt); 91 92 void signalInterrupt(int line); 93}; 94 95}; // namespace X86ISA 96 97#endif //__DEV_X86_I8259_HH__ |