1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 18 unchanged lines hidden (view full) --- 27 * 28 * Authors: Gabe Black 29 */ 30 31#ifndef __DEV_X86_I8259_HH__ 32#define __DEV_X86_I8259_HH__ 33 34#include "dev/io_device.hh" |
35#include "dev/x86/intdev.hh" |
36#include "params/I8259.hh" |
37#include "enums/X86I8259CascadeMode.hh" |
38 39namespace X86ISA 40{ 41 |
42class I8259 : public BasicPioDevice, public IntDev |
43{ 44 protected: 45 Tick latency; |
46 IntPin *output; 47 Enums::X86I8259CascadeMode mode; |
48 49 // Interrupt Request Register 50 uint8_t IRR; 51 // In Service Register 52 uint8_t ISR; 53 // Interrupt Mask Register 54 uint8_t IMR; 55 --- 13 unchanged lines hidden (view full) --- 69 typedef I8259Params Params; 70 71 const Params * 72 params() const 73 { 74 return dynamic_cast<const Params *>(_params); 75 } 76 |
77 I8259(Params * p) : BasicPioDevice(p), latency(p->pio_latency), 78 output(p->output), mode(p->mode), readIRR(true), 79 initControlWord(0) |
80 { 81 pioSize = 2; |
82 } 83 84 Tick read(PacketPtr pkt); 85 86 Tick write(PacketPtr pkt); 87 88 void signalInterrupt(int line); 89}; 90 91}; // namespace X86ISA 92 93#endif //__DEV_X86_I8259_HH__ |