i8259.cc (5687:cec3cfa0b6b5) i8259.cc (5688:e18928b6b108)
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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31#include "base/bitfield.hh"
32#include "dev/x86/i82094aa.hh"
33#include "dev/x86/i8259.hh"
34
35X86ISA::I8259::I8259(Params * p) : BasicPioDevice(p), IntDev(this),
36 latency(p->pio_latency), output(p->output),
37 mode(p->mode), slave(NULL),
38 IRR(0), ISR(0), IMR(0),
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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31#include "base/bitfield.hh"
32#include "dev/x86/i82094aa.hh"
33#include "dev/x86/i8259.hh"
34
35X86ISA::I8259::I8259(Params * p) : BasicPioDevice(p), IntDev(this),
36 latency(p->pio_latency), output(p->output),
37 mode(p->mode), slave(NULL),
38 IRR(0), ISR(0), IMR(0),
39 readIRR(true), initControlWord(0)
39 readIRR(true), initControlWord(0), autoEOI(false)
40{
41 if (output) {
42 I8259 * master;
43 master = dynamic_cast<I8259 *>(output->getDevice());
44 if (master)
45 master->setSlave(this);
46 I82094AA * ioApic;
47 ioApic = dynamic_cast<I82094AA *>(output->getDevice());

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86 IMR = 0;
87 edgeTriggered = bits(val, 3);
88 DPRINTF(I8259, "%s triggered mode.\n",
89 edgeTriggered ? "Edge" : "Level");
90 cascadeMode = !bits(val, 1);
91 DPRINTF(I8259, "%s mode.\n",
92 cascadeMode ? "Cascade" : "Single");
93 expectICW4 = bits(val, 0);
40{
41 if (output) {
42 I8259 * master;
43 master = dynamic_cast<I8259 *>(output->getDevice());
44 if (master)
45 master->setSlave(this);
46 I82094AA * ioApic;
47 ioApic = dynamic_cast<I82094AA *>(output->getDevice());

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86 IMR = 0;
87 edgeTriggered = bits(val, 3);
88 DPRINTF(I8259, "%s triggered mode.\n",
89 edgeTriggered ? "Edge" : "Level");
90 cascadeMode = !bits(val, 1);
91 DPRINTF(I8259, "%s mode.\n",
92 cascadeMode ? "Cascade" : "Single");
93 expectICW4 = bits(val, 0);
94 if (!expectICW4) {
95 autoEOI = false;
96 }
94 initControlWord = 1;
95 DPRINTF(I8259, "Expecting %d more bytes.\n", expectICW4 ? 3 : 2);
96 } else if (bits(val, 4, 3) == 0) {
97 DPRINTF(I8259, "Received operation command word 2.\n");
98 switch (bits(val, 7, 5)) {
99 case 0x0:
100 DPRINTF(I8259,
101 "Subcommand: Rotate in auto-EOI mode (clear).\n");

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198 }
199 if (bits(val, 3) == 0) {
200 DPRINTF(I8259, "Nonbuffered.\n");
201 } else if (bits(val, 2) == 0) {
202 DPRINTF(I8259, "Buffered.\n");
203 } else {
204 DPRINTF(I8259, "Unrecognized buffer mode.\n");
205 }
97 initControlWord = 1;
98 DPRINTF(I8259, "Expecting %d more bytes.\n", expectICW4 ? 3 : 2);
99 } else if (bits(val, 4, 3) == 0) {
100 DPRINTF(I8259, "Received operation command word 2.\n");
101 switch (bits(val, 7, 5)) {
102 case 0x0:
103 DPRINTF(I8259,
104 "Subcommand: Rotate in auto-EOI mode (clear).\n");

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201 }
202 if (bits(val, 3) == 0) {
203 DPRINTF(I8259, "Nonbuffered.\n");
204 } else if (bits(val, 2) == 0) {
205 DPRINTF(I8259, "Buffered.\n");
206 } else {
207 DPRINTF(I8259, "Unrecognized buffer mode.\n");
208 }
209 autoEOI = bits(val, 1);
206 DPRINTF(I8259, "%s End Of Interrupt.\n",
210 DPRINTF(I8259, "%s End Of Interrupt.\n",
207 bits(val, 1) ? "Automatic" : "Normal");
211 autoEOI ? "Automatic" : "Normal");
212
208 DPRINTF(I8259, "%s mode.\n", bits(val, 0) ? "80x86" : "MCX-80/85");
209 initControlWord = 0;
210 break;
211 }
212 break;
213 }
214 return latency;
215}

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260 * This code only handles one slave. Since that's how the PC platform
261 * always uses the 8259 PIC, there shouldn't be any need for more. If
262 * there -is- a need for more for some reason, "slave" can become a
263 * vector of slaves.
264 */
265 int line = findMsbSet(IRR);
266 IRR &= ~(1 << line);
267 DPRINTF(I8259, "Interrupt %d was accepted.\n", line);
213 DPRINTF(I8259, "%s mode.\n", bits(val, 0) ? "80x86" : "MCX-80/85");
214 initControlWord = 0;
215 break;
216 }
217 break;
218 }
219 return latency;
220}

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265 * This code only handles one slave. Since that's how the PC platform
266 * always uses the 8259 PIC, there shouldn't be any need for more. If
267 * there -is- a need for more for some reason, "slave" can become a
268 * vector of slaves.
269 */
270 int line = findMsbSet(IRR);
271 IRR &= ~(1 << line);
272 DPRINTF(I8259, "Interrupt %d was accepted.\n", line);
268 ISR |= 1 << line;
273 if (autoEOI) {
274 handleEOI(line);
275 } else {
276 ISR |= 1 << line;
277 }
269 if (slave && bits(cascadeBits, line)) {
270 DPRINTF(I8259, "Interrupt was from slave who will "
271 "provide the vector.\n");
272 return slave->getVector();
273 }
274 return line | vectorOffset;
275}
276
277X86ISA::I8259 *
278I8259Params::create()
279{
280 return new X86ISA::I8259(this);
281}
278 if (slave && bits(cascadeBits, line)) {
279 DPRINTF(I8259, "Interrupt was from slave who will "
280 "provide the vector.\n");
281 return slave->getVector();
282 }
283 return line | vectorOffset;
284}
285
286X86ISA::I8259 *
287I8259Params::create()
288{
289 return new X86ISA::I8259(this);
290}